[S] Change in coreboot[main]: soc/amd/cezanne: Disable I2S internal clock based on mainboard config

[Felix Held (Code Review)]

Attention is currently required from: Anand Vaikar, Fred Reitberger, Jason Glenesk, Matt DeVillier, Nick Kochlowski.

Felix Held has posted comments on this change by Anand Vaikar. ( https://review.coreboot.org/c/coreboot/+/85865?usp=email )

Change subject: soc/amd/cezanne: Disable I2S internal clock based on mainboard config
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Patch Set 3:

(3 comments)

Commit Message:

https://review.coreboot.org/c/coreboot/+/85865/comment/67f037e5_ddcc92f6?usp... :
PS3, Line 7: soc/amd/cezanne: Disable I2S internal clock based on mainboard config
maybe:

soc/amd/cezanne: add option to disable I2S master clock output of FCH

Add a devicetree option to disable the 48MHz clock output of the FCH when an I2S audio coded uses a separate oscillator for its 48 MHz master clock instead of the FCH clock output. This code was ported from the Picasso code base.

File src/soc/amd/cezanne/fch.c:

https://review.coreboot.org/c/coreboot/+/85865/comment/6af47058_70707bd1?usp... :
PS3, Line 86: const struct soc_amd_cezanne_config *cfg;
            : 	cfg = config_of_soc();
i'd do the creation of the local variable and the assignment in one line:

const struct soc_amd_picasso_config *cfg = config_of_soc();

that's more compact and in line with the picasso code

https://review.coreboot.org/c/coreboot/+/85865/comment/083ab5e3_3d9df732?usp... :
PS3, Line 89: 	/* Master clock is dsabled as the clock is given externally*/
i'd say that this line of comments is a bit redundant and could be dropped. also a typo in d*i*sabled and a space missing before the */