Attention is currently required from: Hannah Williams, Subrata Banik, Jérémy Compostella.
Bora Guvendik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74141 )
Change subject: soc/intel/cmn/pcie: Add ability for SoC to overwrite snoop/no-snoop latency
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Patch Set 4:
(3 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/74141/comment/f6807816_f65a2d23
PS3, Line 7: common/pcie
soc/intel/cmn/pcie
Done
https://review.coreboot.org/c/coreboot/+/74141/comment/63854143_2b0c9f27
PS3, Line 13: Boot to OS and check if able to overwrite values.
which platform and how to check the overridden value ?
Done
Patchset:
PS3:
please mention the default value here? […]
PCIe was not power gated and blocked S0ix entry
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