Change in coreboot[master]: nb/intel/x4x: Constify write leveling arrays

[Angel Pons (Code Review)]

Attention is currently required from: Damien Zammit, Patrick Rudolph.
Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/49403 )

Change subject: nb/intel/x4x: Constify write leveling arrays
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nb/intel/x4x: Constify write leveling arrays

Change-Id: I3be3952aaba1fe2da5490b071b4e3609773e84a5
Signed-off-by: Angel Pons 
---
M src/northbridge/intel/x4x/dq_dqs.c
1 file changed, 2 insertions(+), 2 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/03/49403/1

diff --git a/src/northbridge/intel/x4x/dq_dqs.c b/src/northbridge/intel/x4x/dq_dqs.c
index c6171d9..342fd87 100644
--- a/src/northbridge/intel/x4x/dq_dqs.c
+++ b/src/northbridge/intel/x4x/dq_dqs.c
@@ -766,9 +766,9 @@
    u8 config, rank0, rank1, lane;
    struct dll_setting dq_setting;

-	u8 chanconfig_lut[16]={0, 6, 4, 6, 7, 3, 1, 3, 5, 2, 0, 2, 7, 3, 1, 3};
+	const u8 chanconfig_lut[16] = {0, 6, 4, 6, 7, 3, 1, 3, 5, 2, 0, 2, 7, 3, 1, 3};

-	u8 odt_force[8][4] = { /* [Config][leveling rank] */
+	const u8 odt_force[8][4] = { /* [Config][leveling rank] */
    	{0x5, 0x6, 0x5, 0x9},
    	{0x5, 0x6, 0x5, 0x0},
    	{0x5, 0x0, 0x5, 0x9},