Attention is currently required from: Julius Werner. Moritz Fischer has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/50887 )
Change subject: soc/rockchip/rk3399/sdram: Use rank_mask in CA training ......................................................................
soc/rockchip/rk3399/sdram: Use rank_mask in CA training
Add rank_mask based on the rank number and iterate based on that rather than iterating all values.
Note: LPDDR4 uses a different rank mask.
Signed-off-by: Moritz Fischer moritzf@google.com Change-Id: I85f449af9f946ad677808800cdbe59e2001202c3 --- M src/soc/rockchip/rk3399/sdram.c 1 file changed, 12 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/87/50887/1
diff --git a/src/soc/rockchip/rk3399/sdram.c b/src/soc/rockchip/rk3399/sdram.c index 89463aa..efa820a 100644 --- a/src/soc/rockchip/rk3399/sdram.c +++ b/src/soc/rockchip/rk3399/sdram.c @@ -614,14 +614,24 @@ { u32 *denali_pi = rk3399_ddr_pi[channel]->denali_pi; u32 *denali_phy = rk3399_ddr_publ[channel]->denali_phy; - u32 i, tmp; u32 obs_0, obs_1, obs_2, obs_err = 0; u32 rank = params->ch[channel].rank; + u32 rank_mask; + u32 i, tmp;
/* clear interrupt,PI_175 PI_INT_ACK:WR:0:17 */ write32(&denali_pi[175], 0x00003f7c);
- for (i = 0; i < rank; i++) { + /* required rank mask is different for LPDDR4 */ + if (params->dramtype == LPDDR4) + rank_mask = (rank == 1) ? 0x5 : 0xf; + else + rank_mask = (rank == 1) ? 0x1 : 0x3; + + for (i = 0; i < 4; i++) { + if (!(rank_mask & (1 << i))) + continue; + select_per_cs_training_index(channel, i); /* PI_100 PI_CALVL_EN:RW:8:2 */ clrsetbits32(&denali_pi[100], 0x3 << 8, 0x2 << 8);