Patch set updated for coreboot: drivers/intel/fsp2_0: Add SiliconInit API

[Andrey Petrov]

Andrey Petrov ([e-mail]) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13799

-gerrit

commit 358beca6508d1a96c477b9644663466de21778b6
Author: Andrey Petrov 
Date:   Thu Feb 25 14:17:45 2016 -0800

drivers/intel/fsp2_0: Add SiliconInit API

This adds SiliconInit API that is needed to be called after memory
    has been trained. This call is needed to let the blob do various
    initialisations of IP blocks.

Change-Id: I35e02f22174c8392e55ac869265a19c4309932e5
    Signed-off-by: Andrey Petrov 
---
 src/drivers/intel/fsp2_0/silicon_init.c | 56 +++++++++++++++++++++++++++++++++
 1 file changed, 56 insertions(+)

diff --git a/src/drivers/intel/fsp2_0/silicon_init.c b/src/drivers/intel/fsp2_0/silicon_init.c
new file mode 100644
index 0000000..9d6eb46
--- /dev/null
+++ b/src/drivers/intel/fsp2_0/silicon_init.c
@@ -0,0 +1,56 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2015 Intel Corp.
+ * (Written by Andrey Petrov  for Intel Corp.)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include <arch/cpu.h>
+#include <cbfs.h>
+#include <console/console.h>
+#include <fsp/api.h>
+#include <fsp/util.h>
+
+#define FSPS_OFFSET_S_CONFIG						0x40
+
+struct fsp_header fsps_hdr;
+
+typedef asmlinkage enum fsp_status (*fsp_silicon_init_fn)
+				   (void *silicon_upd);
+
+static enum fsp_status do_silicon_init(struct fsp_header *hdr)
+{
+	uint8_t *silicon_upd;
+	struct FSP_S_CONFIG *fsp_s_config;
+	fsp_silicon_init_fn silicon_init;
+	enum fsp_status status;
+
+	silicon_upd  = (uint8_t *) (hdr->cfg_region_offset + hdr->image_base);
+	/* UPD region is in RW memory, so it can be modified directly */
+	fsp_s_config = (struct FSP_S_CONFIG *) (silicon_upd +
+							FSPS_OFFSET_S_CONFIG);
+
+	/* Give SoC/mainboard a chance to populate entries */
+	platform_fsp_silicon_init_params_cb(fsp_s_config);
+
+	silicon_init = (void *) (hdr->image_base +
+						hdr->silicon_init_entry_offset);
+
+	status = silicon_init(silicon_upd);
+	printk(BIOS_DEBUG, "FspSiliconInit returned 0x%08x\n", status);
+	return status;
+}
+
+enum fsp_status fsp_silicon_init(struct range_entry *range)
+{
+	/* Load FSP-S and save FSP header. We will need it for Notify */
+	if (fsp_load_binary(&fsps_hdr, "blobs/fsps.bin", range) != CB_SUCCESS)
+		return FSP_NOT_FOUND;
+
+	return do_silicon_init(&fsps_hdr);
+}