Change in coreboot[master]: soc/intel/alderlake: Enable VT-d

[Meera Ravindranath (Code Review)]

Attention is currently required from: Furquan Shaikh, Maulik V Vaghela, Tim Wawrzynczak, Meera Ravindranath, Ronak Kanabar, Patrick Rudolph.
Hello build bot (Jenkins), Maulik V Vaghela, Subrata Banik, Ronak Kanabar, Patrick Rudolph,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/51849

to look at the new patch set (#6).

Change subject: soc/intel/alderlake: Enable VT-d
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soc/intel/alderlake: Enable VT-d

Update UPDs required for enabling VT-d.

TEST=Boot to kernel, load ChromeOS VM.

Signed-off-by: Meera Ravindranath 
Change-Id: I96a9f3df185002a4e58faa910f867ace0b97ec2b
---
M src/soc/intel/alderlake/romstage/fsp_params.c
1 file changed, 26 insertions(+), 3 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/49/51849/6