[M] Change in coreboot[master]: soc/amd/mendocino: Enhance DPTC_INPUT to support 13 DPTC thermal para...

[EricKY Cheng (Code Review)]

Attention is currently required from: Jason Glenesk, Raul Rangel, Jason Nien, Matt DeVillier, Martin Roth, Tim Van Patten, Fred Reitberger, Felix Held.

EricKY Cheng has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68649 )

Change subject: soc/amd/mendocino: Enhance DPTC_INPUT to support 13 DPTC thermal parameters
......................................................................

Patch Set 31:

(1 comment)

File src/soc/amd/mendocino/root_complex.c:

https://review.coreboot.org/c/coreboot/+/68649/comment/810032b0_bdb6450f 
PS16, Line 393: #else
> Hi all, […]

Hi AMD,

We have added below values into overridetree.cb.
vrm_current_limit_throttle_mA,
vrm_maximum_current_limit_throttle_mA,
vrm_soc_current_limit_throttle_mA,

Could you help to check any other missing values that we need to fill in winterhold's overridetree.cb.