[S] Change in coreboot[main]: sb/intel/bd82x6x: Disable unused PCIe root ports

[Patrick Rudolph (Code Review)]

Attention is currently required from: Kyösti Mälkki.

Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78226?usp=email )

Change subject: sb/intel/bd82x6x: Disable unused PCIe root ports
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Patch Set 2:

(3 comments)

File src/southbridge/intel/bd82x6x/pch.h:

https://review.coreboot.org/c/coreboot/+/78226/comment/bd06069b_9b3b7df0 :
PS1, Line 86: #define D28Fx_XCAP		0x42
> I believe these are offsets into PCI express capability block at 0x40 + PCI_EXP_xxx from pci_def.h? […]

Done

https://review.coreboot.org/c/coreboot/+/78226/comment/b484e048_6e37c0f0 :
PS1, Line 88: #define D28Fx_LCTL		0x50
>

Done

https://review.coreboot.org/c/coreboot/+/78226/comment/c582be60_b8e9a574 :
PS1, Line 90: #define D28Fx_SLSTS		0x58
> Seems like 0x58 would be CTL, 0x5A and 0x5B status? […]

Done