Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/36841 )
Change subject: soc/intel/{icl,tgl}: Rename pch_early_init() to pch_init() ......................................................................
soc/intel/{icl,tgl}: Rename pch_early_init() to pch_init()
This patch renames pch_early_init() function as per review feedback CB:36550
Change-Id: I9f638e738d1a910b688cc3e51795230b2e542f82 Signed-off-by: Subrata Banik subrata.banik@intel.com --- M src/soc/intel/icelake/bootblock/bootblock.c M src/soc/intel/icelake/bootblock/pch.c M src/soc/intel/icelake/include/soc/bootblock.h M src/soc/intel/tigerlake/bootblock/bootblock.c M src/soc/intel/tigerlake/bootblock/pch.c M src/soc/intel/tigerlake/include/soc/bootblock.h 6 files changed, 6 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/41/36841/1
diff --git a/src/soc/intel/icelake/bootblock/bootblock.c b/src/soc/intel/icelake/bootblock/bootblock.c index f348c1b..fce3cc4 100644 --- a/src/soc/intel/icelake/bootblock/bootblock.c +++ b/src/soc/intel/icelake/bootblock/bootblock.c @@ -40,5 +40,5 @@ void bootblock_soc_init(void) { report_platform_info(); - pch_early_init(); + pch_init(); } diff --git a/src/soc/intel/icelake/bootblock/pch.c b/src/soc/intel/icelake/bootblock/pch.c index b8a404b..fd2ffd2 100644 --- a/src/soc/intel/icelake/bootblock/pch.c +++ b/src/soc/intel/icelake/bootblock/pch.c @@ -150,7 +150,7 @@ pch_enable_lpc(); }
-void pch_early_init(void) +void pch_init(void) { /* * Enabling ABASE for accessing PM1_STS, PM1_EN, PM1_CNT, diff --git a/src/soc/intel/icelake/include/soc/bootblock.h b/src/soc/intel/icelake/include/soc/bootblock.h index 4ca2c37..22e632fc 100644 --- a/src/soc/intel/icelake/include/soc/bootblock.h +++ b/src/soc/intel/icelake/include/soc/bootblock.h @@ -21,7 +21,7 @@ void bootblock_pch_early_init(void);
/* Bootblock post console init programming */ -void pch_early_init(void); +void pch_init(void); void pch_early_iorange_init(void); void report_platform_info(void);
diff --git a/src/soc/intel/tigerlake/bootblock/bootblock.c b/src/soc/intel/tigerlake/bootblock/bootblock.c index f6fe4c4..a4f9659 100644 --- a/src/soc/intel/tigerlake/bootblock/bootblock.c +++ b/src/soc/intel/tigerlake/bootblock/bootblock.c @@ -40,5 +40,5 @@ void bootblock_soc_init(void) { report_platform_info(); - pch_early_init(); + pch_init(); } diff --git a/src/soc/intel/tigerlake/bootblock/pch.c b/src/soc/intel/tigerlake/bootblock/pch.c index c7ccbf8..1ef4928 100644 --- a/src/soc/intel/tigerlake/bootblock/pch.c +++ b/src/soc/intel/tigerlake/bootblock/pch.c @@ -156,7 +156,7 @@ pch_enable_lpc(); }
-void pch_early_init(void) +void pch_init(void) { /* * Enabling ABASE for accessing PM1_STS, PM1_EN, PM1_CNT, diff --git a/src/soc/intel/tigerlake/include/soc/bootblock.h b/src/soc/intel/tigerlake/include/soc/bootblock.h index cb7417a..6dbbfec 100644 --- a/src/soc/intel/tigerlake/include/soc/bootblock.h +++ b/src/soc/intel/tigerlake/include/soc/bootblock.h @@ -21,7 +21,7 @@ void bootblock_pch_early_init(void);
/* Bootblock post console init programming */ -void pch_early_init(void); +void pch_init(void); void pch_early_iorange_init(void); void report_platform_info(void);
Patrick Georgi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36841 )
Change subject: soc/intel/{icl,tgl}: Rename pch_early_init() to pch_init() ......................................................................
Patch Set 1: Code-Review+2
V Sowmya has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36841 )
Change subject: soc/intel/{icl,tgl}: Rename pch_early_init() to pch_init() ......................................................................
Patch Set 1: Code-Review+2
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/36841 )
Change subject: soc/intel/{icl,tgl}: Rename pch_early_init() to pch_init() ......................................................................
soc/intel/{icl,tgl}: Rename pch_early_init() to pch_init()
This patch renames pch_early_init() function as per review feedback CB:36550
Change-Id: I9f638e738d1a910b688cc3e51795230b2e542f82 Signed-off-by: Subrata Banik subrata.banik@intel.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/36841 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Patrick Georgi pgeorgi@google.com Reviewed-by: V Sowmya v.sowmya@intel.com --- M src/soc/intel/icelake/bootblock/bootblock.c M src/soc/intel/icelake/bootblock/pch.c M src/soc/intel/icelake/include/soc/bootblock.h M src/soc/intel/tigerlake/bootblock/bootblock.c M src/soc/intel/tigerlake/bootblock/pch.c M src/soc/intel/tigerlake/include/soc/bootblock.h 6 files changed, 6 insertions(+), 6 deletions(-)
Approvals: build bot (Jenkins): Verified Patrick Georgi: Looks good to me, approved V Sowmya: Looks good to me, approved
diff --git a/src/soc/intel/icelake/bootblock/bootblock.c b/src/soc/intel/icelake/bootblock/bootblock.c index f348c1b..fce3cc4 100644 --- a/src/soc/intel/icelake/bootblock/bootblock.c +++ b/src/soc/intel/icelake/bootblock/bootblock.c @@ -40,5 +40,5 @@ void bootblock_soc_init(void) { report_platform_info(); - pch_early_init(); + pch_init(); } diff --git a/src/soc/intel/icelake/bootblock/pch.c b/src/soc/intel/icelake/bootblock/pch.c index b8a404b..fd2ffd2 100644 --- a/src/soc/intel/icelake/bootblock/pch.c +++ b/src/soc/intel/icelake/bootblock/pch.c @@ -150,7 +150,7 @@ pch_enable_lpc(); }
-void pch_early_init(void) +void pch_init(void) { /* * Enabling ABASE for accessing PM1_STS, PM1_EN, PM1_CNT, diff --git a/src/soc/intel/icelake/include/soc/bootblock.h b/src/soc/intel/icelake/include/soc/bootblock.h index 4ca2c37..22e632fc 100644 --- a/src/soc/intel/icelake/include/soc/bootblock.h +++ b/src/soc/intel/icelake/include/soc/bootblock.h @@ -21,7 +21,7 @@ void bootblock_pch_early_init(void);
/* Bootblock post console init programming */ -void pch_early_init(void); +void pch_init(void); void pch_early_iorange_init(void); void report_platform_info(void);
diff --git a/src/soc/intel/tigerlake/bootblock/bootblock.c b/src/soc/intel/tigerlake/bootblock/bootblock.c index f6fe4c4..a4f9659 100644 --- a/src/soc/intel/tigerlake/bootblock/bootblock.c +++ b/src/soc/intel/tigerlake/bootblock/bootblock.c @@ -40,5 +40,5 @@ void bootblock_soc_init(void) { report_platform_info(); - pch_early_init(); + pch_init(); } diff --git a/src/soc/intel/tigerlake/bootblock/pch.c b/src/soc/intel/tigerlake/bootblock/pch.c index c7ccbf8..1ef4928 100644 --- a/src/soc/intel/tigerlake/bootblock/pch.c +++ b/src/soc/intel/tigerlake/bootblock/pch.c @@ -156,7 +156,7 @@ pch_enable_lpc(); }
-void pch_early_init(void) +void pch_init(void) { /* * Enabling ABASE for accessing PM1_STS, PM1_EN, PM1_CNT, diff --git a/src/soc/intel/tigerlake/include/soc/bootblock.h b/src/soc/intel/tigerlake/include/soc/bootblock.h index cb7417a..6dbbfec 100644 --- a/src/soc/intel/tigerlake/include/soc/bootblock.h +++ b/src/soc/intel/tigerlake/include/soc/bootblock.h @@ -21,7 +21,7 @@ void bootblock_pch_early_init(void);
/* Bootblock post console init programming */ -void pch_early_init(void); +void pch_init(void); void pch_early_iorange_init(void); void report_platform_info(void);
-
Patrick Georgi (Code Review) -
Subrata Banik (Code Review)
-
V Sowmya (Code Review)