[S] Change in coreboot[master]: mb/google/brya/var/gladios: Update fw_config STORAGE field

[Kevin Chiu (Code Review)]

Kevin Chiu has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/70223 )

Change subject: mb/google/brya/var/gladios: Update fw_config STORAGE field
......................................................................

mb/google/brya/var/gladios: Update fw_config STORAGE field

option STORAGE_EMMC 0
option STORAGE_NVME 1

BUG=b:239513596
TEST=FW_NAME=gladios emerge-brask coreboot

Signed-off-by: Kevin Chiu 
Change-Id: I27baa2ca8c2b334fb81aa87b22c3b7c028c38cd8
---
M src/mainboard/google/brya/variants/gladios/overridetree.cb
1 file changed, 26 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/23/70223/1

diff --git a/src/mainboard/google/brya/variants/gladios/overridetree.cb b/src/mainboard/google/brya/variants/gladios/overridetree.cb
index ae099c3..c8e3da5 100644
--- a/src/mainboard/google/brya/variants/gladios/overridetree.cb
+++ b/src/mainboard/google/brya/variants/gladios/overridetree.cb
@@ -1,3 +1,10 @@
+fw_config
+	field STORAGE 1 1
+		option STORAGE_EMMC	0
+		option STORAGE_NVME	1
+	end
+end
+
 chip soc/intel/alderlake
    register "sagv" = "SaGv_Enabled"

@@ -142,7 +149,8 @@
    			.clk_src = 0,
    			.flags = PCIE_RP_LTR | PCIE_RP_AER,
    		}"
-		end
+			probe STORAGE STORAGE_NVME
+		end #NVMe
    	device ref tbt_pcie_rp0 off end
    	device ref tbt_pcie_rp1 off end
    	device ref tbt_pcie_rp2 off end
@@ -201,6 +209,7 @@
    			.clk_req = 4,
    			.flags = PCIE_RP_HOTPLUG | PCIE_RP_AER,
    		}"
+			probe STORAGE STORAGE_EMMC
    	end     #PCIE12 EMMC
    	device ref gspi1 off end
    	device ref pch_espi on