Rex Chou has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/79764?usp=email )
Change subject: mb/google/nissa/var/craaskov: Implement touchscreen power sequencing ......................................................................
mb/google/nissa/var/craaskov: Implement touchscreen power sequencing
For brya variants with a touchscreen, drive the enable GPIO high starting in romstage while holding in reset, then disable the reset GPIO in ramstage (done in the baseboard). This will allow coreboot to detect the presence of i2c touchscreens during ACPI SSDT generation (implemented in a subsequent commit).
BUG=b:317746281 TEST=emerge-nissa coreboot chromeos-bootimage
Change-Id: I85f2bee58582c0f56331d20a2984a3079c967be4 Signed-off-by: rex_chou rex_chou@compal.corp-partner.google.com
Change-Id: I3ca2e2d12a86eaae9e37870a2541c0287e354690 --- M src/mainboard/google/brya/variants/craaskov/gpio.c 1 file changed, 14 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/64/79764/1
diff --git a/src/mainboard/google/brya/variants/craaskov/gpio.c b/src/mainboard/google/brya/variants/craaskov/gpio.c index 8b1446d..0d280ce 100644 --- a/src/mainboard/google/brya/variants/craaskov/gpio.c +++ b/src/mainboard/google/brya/variants/craaskov/gpio.c @@ -63,6 +63,14 @@ PAD_CFG_NF(GPP_H11, NONE, DEEP, NF2), };
+static const struct pad_config romstage_gpio_table[] = { + /* Enable touchscreen, hold in reset */ + /* C0 : SMBCLK ==> EN_PP3300_TCHSCR */ + PAD_CFG_GPO(GPP_C0, 1, DEEP), + /* C1 : SMBDATA ==> USI_RST_L */ + PAD_CFG_GPO(GPP_C1, 0, DEEP), +}; + const struct pad_config *variant_gpio_override_table(size_t *num) { *num = ARRAY_SIZE(override_gpio_table); @@ -74,3 +82,9 @@ *num = ARRAY_SIZE(early_gpio_table); return early_gpio_table; } + +const struct pad_config *variant_romstage_gpio_table(size_t *num) +{ + *num = ARRAY_SIZE(romstage_gpio_table); + return romstage_gpio_table; +}