Felix Singer has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/49206 )
Change subject: arch/{arm,arm64}: Remove trailing semicolons from macros ......................................................................
arch/{arm,arm64}: Remove trailing semicolons from macros
Macros should not use a trailing semicolon. Remove them.
Change-Id: I02544ad36b42b3dbabbfc97b3485849aa420d6e7 Signed-off-by: Felix Singer felixsinger@posteo.net --- M src/arch/arm/include/arch/memlayout.h M src/arch/arm64/include/arch/memlayout.h M src/arch/arm64/include/armv8/arch/barrier.h 3 files changed, 11 insertions(+), 11 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/06/49206/1
diff --git a/src/arch/arm/include/arch/memlayout.h b/src/arch/arm/include/arch/memlayout.h index 1395e82..3fc64d0 100644 --- a/src/arch/arm/include/arch/memlayout.h +++ b/src/arch/arm/include/arch/memlayout.h @@ -10,26 +10,26 @@ #define TTB(addr, size) \ REGION(ttb, addr, size, 16K) \ _ = ASSERT(size >= 16K + CONFIG(ARM_LPAE) * 32, \ - "TTB must be 16K (+ 32 for LPAE)!"); + "TTB must be 16K (+ 32 for LPAE)!")
#define TTB_SUBTABLES(addr, size) \ REGION(ttb_subtables, addr, size, CONFIG(ARM_LPAE)*3K + 1K) \ _ = ASSERT(size % (1K + 3K * CONFIG(ARM_LPAE)) == 0, \ - "TTB subtable region must be evenly divisible by table size!"); + "TTB subtable region must be evenly divisible by table size!")
/* ARM stacks need 8-byte alignment and stay in one place through ramstage. */ #define STACK(addr, size) \ REGION(stack, addr, size, 8) \ - _ = ASSERT(size >= 2K, "stack should be >= 2K, see toolchain.inc"); + _ = ASSERT(size >= 2K, "stack should be >= 2K, see toolchain.inc")
#define DMA_COHERENT(addr, size) \ REGION(dma_coherent, addr, size, SUPERPAGE_SIZE) \ _ = ASSERT(size % SUPERPAGE_SIZE == 0, \ - "DMA coherency buffer must fit exactly in full superpages!"); + "DMA coherency buffer must fit exactly in full superpages!")
#define FRAMEBUFFER(addr, size) \ REGION(framebuffer, addr, size, SUPERPAGE_SIZE) \ _ = ASSERT(size % SUPERPAGE_SIZE == 0, \ - "Framebuffer must fit exactly in full superpages!"); + "Framebuffer must fit exactly in full superpages!")
#endif /* __ARCH_MEMLAYOUT_H */ diff --git a/src/arch/arm64/include/arch/memlayout.h b/src/arch/arm64/include/arch/memlayout.h index a04033d..b5b82cc 100644 --- a/src/arch/arm64/include/arch/memlayout.h +++ b/src/arch/arm64/include/arch/memlayout.h @@ -7,25 +7,25 @@
#define TTB(addr, size) \ REGION(ttb, addr, size, 4K) \ - _ = ASSERT(size % 4K == 0, "TTB size must be divisible by 4K!"); + _ = ASSERT(size % 4K == 0, "TTB size must be divisible by 4K!")
#define DMA_COHERENT(addr, size) \ REGION(dma_coherent, addr, size, 4K) \ _ = ASSERT(size % 4K == 0, \ - "DMA buffer should be multiple of smallest page size (4K)!"); + "DMA buffer should be multiple of smallest page size (4K)!")
#define FRAMEBUFFER(addr, size) \ REGION(framebuffer, addr, size, 1M) \ _ = ASSERT(size % 1M == 0, \ - "Framebuffer must fit exactly in 1M!"); + "Framebuffer must fit exactly in 1M!")
/* ARM64 stacks need 16-byte alignment. */ #define STACK(addr, size) \ REGION(stack, addr, size, 16) \ - _ = ASSERT(size >= 2K, "stack should be >= 2K, see toolchain.inc"); + _ = ASSERT(size >= 2K, "stack should be >= 2K, see toolchain.inc")
#define BL31(addr, size) \ REGION(bl31, addr, size, 4K) \ - _ = ASSERT(size % 4K == 0, "BL31 size must be divisible by 4K!"); + _ = ASSERT(size % 4K == 0, "BL31 size must be divisible by 4K!")
#endif /* __ARCH_MEMLAYOUT_H */ diff --git a/src/arch/arm64/include/armv8/arch/barrier.h b/src/arch/arm64/include/armv8/arch/barrier.h index 99a417b..1725bf5 100644 --- a/src/arch/arm64/include/armv8/arch/barrier.h +++ b/src/arch/arm64/include/armv8/arch/barrier.h @@ -24,7 +24,7 @@ #define barrier() __asm__ __volatile__("": : :"memory") #endif
-#define nop() asm volatile("nop"); +#define nop() asm volatile("nop")
#define force_read(x) (*(volatile typeof(x) *)&(x))
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/49206 )
Change subject: arch/{arm,arm64}: Remove trailing semicolons from macros ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/49206/1/src/arch/arm64/include/armv... File src/arch/arm64/include/armv8/arch/barrier.h:
https://review.coreboot.org/c/coreboot/+/49206/1/src/arch/arm64/include/armv... PS1, Line 27: #define nop() asm volatile("nop") Macros with complex values should be enclosed in parentheses
Hello Julius Werner,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/49206
to look at the new patch set (#2).
Change subject: arch/{arm,arm64}: Remove trailing semicolons from macros ......................................................................
arch/{arm,arm64}: Remove trailing semicolons from macros
Macros should not use a trailing semicolon. Remove them to fix linter issues.
Change-Id: I02544ad36b42b3dbabbfc97b3485849aa420d6e7 Signed-off-by: Felix Singer felixsinger@posteo.net --- M src/arch/arm/include/arch/memlayout.h M src/arch/arm64/include/arch/memlayout.h M src/arch/arm64/include/armv8/arch/barrier.h 3 files changed, 11 insertions(+), 11 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/06/49206/2
Hello build bot (Jenkins), Julius Werner,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/49206
to look at the new patch set (#3).
Change subject: arch/{arm,arm64}: Remove trailing semicolons from macros ......................................................................
arch/{arm,arm64}: Remove trailing semicolons from macros
Macros should not use a trailing semicolon. Remove them to fix linter issues.
Change-Id: I02544ad36b42b3dbabbfc97b3485849aa420d6e7 Signed-off-by: Felix Singer felixsinger@posteo.net --- M src/arch/arm/include/arch/memlayout.h M src/arch/arm64/include/arch/memlayout.h M src/arch/arm64/include/armv8/arch/barrier.h 3 files changed, 11 insertions(+), 11 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/06/49206/3
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/49206 )
Change subject: arch/{arm,arm64}: Remove trailing semicolons from macros ......................................................................
Patch Set 3:
(1 comment)
https://review.coreboot.org/c/coreboot/+/49206/3/src/arch/arm64/include/armv... File src/arch/arm64/include/armv8/arch/barrier.h:
https://review.coreboot.org/c/coreboot/+/49206/3/src/arch/arm64/include/armv... PS3, Line 27: #define nop() asm volatile("nop") Macros with complex values should be enclosed in parentheses
Attention is currently required from: Felix Singer. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/49206 )
Change subject: arch/{arm,arm64}: Remove trailing semicolons from macros ......................................................................
Patch Set 3:
(2 comments)
Patchset:
PS3: Jenkins says no
File src/arch/arm/include/arch/memlayout.h:
https://review.coreboot.org/c/coreboot/+/49206/comment/f99d258e_a5f2bfe3 PS3, Line 3: linker scripts These macros are special
Attention is currently required from: Felix Singer, Angel Pons. Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/49206 )
Change subject: arch/{arm,arm64}: Remove trailing semicolons from macros ......................................................................
Patch Set 3:
(1 comment)
File src/arch/arm/include/arch/memlayout.h:
https://review.coreboot.org/c/coreboot/+/49206/comment/356d4779_d373d8e9 PS3, Line 3: linker scripts
These macros are special
Yes. memlayout is designed to be written without semicolons. Unless we want to change that globally (which would be a lot of code churn that I think is unnecessary), these should stay the way they are.
Felix Singer has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/49206 )
Change subject: arch/{arm,arm64}: Remove trailing semicolons from macros ......................................................................
Abandoned