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I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/49416
to look at the new patch set (#2).
Change subject: mb/intel/leafhill: do LPC/eSPI pad configuration at board-level ......................................................................
mb/intel/leafhill: do LPC/eSPI pad configuration at board-level
Do LPC/eSPI pad configuration at board-level to match other platforms by adding an appropriate early gpio table in the bootblock.
The soc code gets dropped in CB:49410.
Change-Id: Ie1e53e72c65fdcfe4be2e01134873aa7858c28ff Signed-off-by: Michael Niewöhner foss@mniewoehner.de --- M src/mainboard/intel/leafhill/bootblock.c A src/mainboard/intel/leafhill/brd_gpio_early.h 2 files changed, 20 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/16/49416/2