Tim Wawrzynczak has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32405
Change subject: kohaku: Update overridetree.cb ......................................................................
kohaku: Update overridetree.cb
Add common SoC config. Disable PCIe WiFi. Add digitizer. Turn off native SD card interface. No WWAN.
Change-Id: I17d5ba6ce4ec412384e4a1678474b8d26499ba40 Signed-off-by: Tim Wawrzynczak twawrzynczak@chromium.org --- M src/mainboard/google/hatch/variants/baseboard/devicetree.cb M src/mainboard/google/hatch/variants/kohaku/overridetree.cb 2 files changed, 108 insertions(+), 8 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/05/32405/1
diff --git a/src/mainboard/google/hatch/variants/baseboard/devicetree.cb b/src/mainboard/google/hatch/variants/baseboard/devicetree.cb index e39f140..e5d27af 100644 --- a/src/mainboard/google/hatch/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/hatch/variants/baseboard/devicetree.cb @@ -204,7 +204,7 @@ device pci 16.4 off end # Management Engine Interface 3 device pci 16.5 off end # Management Engine Interface 4 device pci 17.0 on end # SATA - device pci 19.0 on end #I2C #4 + device pci 19.0 on end # I2C #4 device pci 19.1 off end # I2C #5 device pci 19.2 off end # UART #2 device pci 1a.0 off end # eMMC diff --git a/src/mainboard/google/hatch/variants/kohaku/overridetree.cb b/src/mainboard/google/hatch/variants/kohaku/overridetree.cb index 6e6414e..9241644 100644 --- a/src/mainboard/google/hatch/variants/kohaku/overridetree.cb +++ b/src/mainboard/google/hatch/variants/kohaku/overridetree.cb @@ -1,12 +1,11 @@ chip soc/intel/cannonlake - register "SerialIoDevMode" = "{ - [PchSerialIoIndexI2C0] = PchSerialIoPci, - [PchSerialIoIndexI2C1] = PchSerialIoPci, - [PchSerialIoIndexI2C2] = PchSerialIoPci, - [PchSerialIoIndexI2C3] = PchSerialIoPci, - [PchSerialIoIndexI2C4] = PchSerialIoPci, - [PchSerialIoIndexI2C5] = PchSerialIoPci, + [PchSerialIoIndexI2C0] = PchSerialIoPci, + [PchSerialIoIndexI2C1] = PchSerialIoPci, + [PchSerialIoIndexI2C2] = PchSerialIoPci, + [PchSerialIoIndexI2C3] = PchSerialIoPci, + [PchSerialIoIndexI2C4] = PchSerialIoPci, + [PchSerialIoIndexI2C5] = PchSerialIoPci, [PchSerialIoIndexSPI0] = PchSerialIoPci, [PchSerialIoIndexSPI1] = PchSerialIoPci, [PchSerialIoIndexSPI2] = PchSerialIoDisabled, @@ -15,4 +14,105 @@ [PchSerialIoIndexUART2] = PchSerialIoDisabled, }"
+ # No PCIe WiFi + register "PcieRpEnable[13]" = "0" + + # Disable native SD detect + register "PcdSdDetectChk" = "0" + register "sd_acpi_mode" = "1" + + # Intel Common SoC Config + #+-------------------+---------------------------+ + #| Field | Value | + #+-------------------+---------------------------+ + #| I2C0 | Trackpad | + #| I2C1 | Touchscreen | + #| I2C2 | Digitizer | + #| I2C4 | Audio | + #+-------------------+---------------------------+ + register "common_soc_config" = "{ + .i2c[0] = { + .speed = I2C_SPEED_FAST, + } + .i2c[1] = { + .speed = I2C_SPEED_FAST, + } + .i2c[2] = { + .speed = I2C_SPEED_FAST, + .rise_time_ns = 152, + .fall_time_ns = 30, + }, + .i2c[4] = { + .speed = I2C_SPEED_FAST, + } + .gspi[0] = { + .speed_mhz = 1, + .early_init = 1, + }, + }" + + device domain 0 on + device pci 14.0 on + chip drivers/usb/acpi + device usb 0.0 on + chip drivers/usb/acpi + device usb 2.5 off end + end + chip drivers/usb/acpi + device usb 3.4 off end + end + end + end + end + device pci 14.5 off end # SDCard + + device pci 15.0 on + chip drivers/i2c/hid + register "generic.hid" = ""PNP0C50"" + register "generic.desc" = ""Synaptics Touchpad"" + register "generic.irq" = "ACPI_IRQ_WAKE_EDGE_LOW(GPIO_D21_IRQ)" + register "generic.wake" = "GPE0_DW2_27" + register "generic.probed" = "1" + register "hid_desc_reg_offset" = "0x20" + device i2c 0x2c on end + end + end # I2C 0 + + device pci 15.2 on + chip drivers/i2c/hid + register "generic.hid" = ""WCOM50C1"" + register "generic.desc" = ""WCOM Digitizer"" + register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_C7_IRQ)" + register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_A10)" + register "reset_delay_ms" = "1" + register "has_power_resource" = "1" + register "hid_desc_reg_offset" = "0x1" + device i2c 09 on end + end + end # I2C #2 + device pci 19.0 on + chip drivers/i2c/da7219 + register "irq" = "ACPI_IRQ_LEVEL_LOW(GPIO_H0_IRQ)" + register "btn_cfg" = "50" + register "mic_det_thr" = "500" + register "jack_ins_deb" = "20" + register "jack_det_rate" = ""32ms_64ms"" + register "jack_rem_deb" = "1" + register "a_d_btn_thr" = "0xa" + register "d_b_btn_thr" = "0x16" + register "b_c_btn_thr" = "0x21" + register "c_mic_btn_thr" = "0x3e" + register "btn_avg" = "4" + register "adc_1bit_rpt" = "1" + register "micbias_lvl" = "2600" + register "mic_amp_in_sel" = ""diff"" + device i2c 1a on end + end + end + # No PCIe WiFi + device pci 1d.5 off end + end # domain + + # no native SD support + register "sdcard_cd_gpio" = "" end
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32405 )
Change subject: kohaku: Update overridetree.cb ......................................................................
Patch Set 1:
(10 comments)
https://review.coreboot.org/#/c/32405/1/src/mainboard/google/hatch/variants/... File src/mainboard/google/hatch/variants/kohaku/overridetree.cb:
https://review.coreboot.org/#/c/32405/1/src/mainboard/google/hatch/variants/... PS1, Line 3: Let's keep this consisten with rest of the entries i.e. use space only.
https://review.coreboot.org/#/c/32405/1/src/mainboard/google/hatch/variants/... PS1, Line 21: PcdSdDetectChk I don't see this defined for cannonlake. Is that required?
https://review.coreboot.org/cgit/coreboot.git/tree/src/soc/intel/cannonlake/...
https://review.coreboot.org/#/c/32405/1/src/mainboard/google/hatch/variants/... PS1, Line 22: sd_acpi_mode Same with this.
https://review.coreboot.org/#/c/32405/1/src/mainboard/google/hatch/variants/... PS1, Line 28: | extra space?
https://review.coreboot.org/#/c/32405/1/src/mainboard/google/hatch/variants/... PS1, Line 42: .rise_time_ns = 152, : .fall_time_ns = 30, These will have to be updated after running tests on the board.
https://review.coreboot.org/#/c/32405/1/src/mainboard/google/hatch/variants/... PS1, Line 73: ACPI_IRQ_WAKE_EDGE_LOW Wake using same gpio as interrupt will not work until the ITSS configuration is fixed in FSP. b/123967687
https://review.coreboot.org/#/c/32405/1/src/mainboard/google/hatch/variants/... PS1, Line 90: 09 0x9 to make it consistent with 0x2c above.
https://review.coreboot.org/#/c/32405/1/src/mainboard/google/hatch/variants/... PS1, Line 94: drivers/i2c/da7219 This will require appropriate config to be selected in Kconfig for hatch.
https://review.coreboot.org/#/c/32405/1/src/mainboard/google/hatch/variants/... PS1, Line 109: 1a 0x1a
https://review.coreboot.org/#/c/32405/1/src/mainboard/google/hatch/variants/... PS1, Line 116: # no native SD support : register "sdcard_cd_gpio" = "" Can you please put this up with rest of the registers?
Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32405 )
Change subject: kohaku: Update overridetree.cb ......................................................................
Patch Set 1:
(10 comments)
https://review.coreboot.org/#/c/32405/1/src/mainboard/google/hatch/variants/... File src/mainboard/google/hatch/variants/kohaku/overridetree.cb:
https://review.coreboot.org/#/c/32405/1/src/mainboard/google/hatch/variants/... PS1, Line 3:
Let's keep this consisten with rest of the entries i.e. use space only.
Done
https://review.coreboot.org/#/c/32405/1/src/mainboard/google/hatch/variants/... PS1, Line 21: PcdSdDetectChk
I don't see this defined for cannonlake. Is that required? […]
Oops, yeah I meant to delete that line.
https://review.coreboot.org/#/c/32405/1/src/mainboard/google/hatch/variants/... PS1, Line 22: sd_acpi_mode
Same with this.
Done
https://review.coreboot.org/#/c/32405/1/src/mainboard/google/hatch/variants/... PS1, Line 28: |
extra space?
Done
https://review.coreboot.org/#/c/32405/1/src/mainboard/google/hatch/variants/... PS1, Line 42: .rise_time_ns = 152, : .fall_time_ns = 30,
These will have to be updated after running tests on the board.
Sure, I just borrowed some numbers from another board w/ the same part for a starting point.
https://review.coreboot.org/#/c/32405/1/src/mainboard/google/hatch/variants/... PS1, Line 73: ACPI_IRQ_WAKE_EDGE_LOW
Wake using same gpio as interrupt will not work until the ITSS configuration is fixed in FSP. […]
Ok, so should I comment out the wake pin for now?
https://review.coreboot.org/#/c/32405/1/src/mainboard/google/hatch/variants/... PS1, Line 90: 09
0x9 to make it consistent with 0x2c above.
Done
https://review.coreboot.org/#/c/32405/1/src/mainboard/google/hatch/variants/... PS1, Line 94: drivers/i2c/da7219
This will require appropriate config to be selected in Kconfig for hatch.
Done
https://review.coreboot.org/#/c/32405/1/src/mainboard/google/hatch/variants/... PS1, Line 109: 1a
0x1a
Done
https://review.coreboot.org/#/c/32405/1/src/mainboard/google/hatch/variants/... PS1, Line 116: # no native SD support : register "sdcard_cd_gpio" = ""
Can you please put this up with rest of the registers?
Done
Hello Paul Fagerburg, Shelley Chen, build bot (Jenkins), Furquan Shaikh,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/32405
to look at the new patch set (#2).
Change subject: mb/google/kohaku: Update overridetree.cb ......................................................................
mb/google/kohaku: Update overridetree.cb
Add common SoC config. Disable PCIe WiFi. Add digitizer. Turn off native SD card interface. No WWAN.
Add DA7219 driver to Kconfig.
Change-Id: I17d5ba6ce4ec412384e4a1678474b8d26499ba40 Signed-off-by: Tim Wawrzynczak twawrzynczak@chromium.org --- M src/mainboard/google/hatch/Kconfig M src/mainboard/google/hatch/variants/baseboard/devicetree.cb M src/mainboard/google/hatch/variants/kohaku/overridetree.cb 3 files changed, 111 insertions(+), 8 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/05/32405/2
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32405 )
Change subject: mb/google/kohaku: Update overridetree.cb ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/#/c/32405/2/src/mainboard/google/hatch/variants/... File src/mainboard/google/hatch/variants/kohaku/overridetree.cb:
https://review.coreboot.org/#/c/32405/2/src/mainboard/google/hatch/variants/... PS2, Line 113: trailing whitespace
Hello Paul Fagerburg, Shelley Chen, build bot (Jenkins), Furquan Shaikh,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/32405
to look at the new patch set (#3).
Change subject: mb/google/kohaku: Update overridetree.cb ......................................................................
mb/google/kohaku: Update overridetree.cb
Add common SoC config. Disable PCIe WiFi. Add digitizer. Turn off native SD card interface. No WWAN.
Add DA7219 driver to Kconfig.
Change-Id: I17d5ba6ce4ec412384e4a1678474b8d26499ba40 Signed-off-by: Tim Wawrzynczak twawrzynczak@chromium.org --- M src/mainboard/google/hatch/Kconfig M src/mainboard/google/hatch/variants/baseboard/devicetree.cb M src/mainboard/google/hatch/variants/kohaku/overridetree.cb 3 files changed, 111 insertions(+), 8 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/05/32405/3
Paul Fagerburg has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32405 )
Change subject: mb/google/kohaku: Update overridetree.cb ......................................................................
Patch Set 3: Code-Review+1
LGTM
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32405 )
Change subject: mb/google/kohaku: Update overridetree.cb ......................................................................
Patch Set 3:
(3 comments)
https://review.coreboot.org/#/c/32405/3/src/mainboard/google/hatch/Kconfig File src/mainboard/google/hatch/Kconfig:
https://review.coreboot.org/#/c/32405/3/src/mainboard/google/hatch/Kconfig@2... PS3, Line 25: DRIVERS_I2C_DA7219 It is fine to just select this up with other drivers. If this driver goes unused, it will be removed from the final image.
https://review.coreboot.org/#/c/32405/1/src/mainboard/google/hatch/variants/... File src/mainboard/google/hatch/variants/kohaku/overridetree.cb:
https://review.coreboot.org/#/c/32405/1/src/mainboard/google/hatch/variants/... PS1, Line 42: .rise_time_ns = 152, : .fall_time_ns = 30,
Sure, I just borrowed some numbers from another board w/ the same part for a starting point.
These numbers vary from board-to-board even if the same device is being used on the I2C bus. Its better to start with nothing here and update it later on.
https://review.coreboot.org/#/c/32405/3/src/mainboard/google/hatch/variants/... File src/mainboard/google/hatch/variants/kohaku/overridetree.cb:
https://review.coreboot.org/#/c/32405/3/src/mainboard/google/hatch/variants/... PS3, Line 21: register "sdcard_cd_gpio" = "" BTW I don't think this is going to work:
error: initialization of 'unsigned int' from 'const char *' makes integer from pointer without a cast [-Werror=int-conversion] .sdcard_cd_gpio = "",
You will have to move the sdcard_cd_gpio configuration in baseboard devicetree to hatch and hatch_whl overridetree.cb. It would be good to do that as a separate change and put it before this CL in the series.
Hello Paul Fagerburg, Shelley Chen, build bot (Jenkins), Furquan Shaikh,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/32405
to look at the new patch set (#4).
Change subject: mb/google/kohaku: Update overridetree.cb ......................................................................
mb/google/kohaku: Update overridetree.cb
Add common SoC config. Disable PCIe WiFi. Add digitizer. Turn off native SD card interface. No WWAN.
Add DA7219 driver to Kconfig.
BUG=b:130310626 BRANCH=none TEST=compiles (no Hatch ref or Kohaku device to test)
Change-Id: I17d5ba6ce4ec412384e4a1678474b8d26499ba40 Signed-off-by: Tim Wawrzynczak twawrzynczak@chromium.org --- M src/mainboard/google/hatch/Kconfig M src/mainboard/google/hatch/variants/kohaku/overridetree.cb 2 files changed, 105 insertions(+), 7 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/05/32405/4
Hello Paul Fagerburg, Shelley Chen, build bot (Jenkins), Furquan Shaikh,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/32405
to look at the new patch set (#5).
Change subject: mb/google/kohaku: Update overridetree.cb ......................................................................
mb/google/kohaku: Update overridetree.cb
Add common SoC config. Disable PCIe WiFi. Add digitizer. Turn off native SD card interface. No WWAN.
Add DA7219 driver to Kconfig.
BUG=b:130310626 BRANCH=none TEST=compiles (no Hatch ref or Kohaku device to test)
Change-Id: I17d5ba6ce4ec412384e4a1678474b8d26499ba40 Signed-off-by: Tim Wawrzynczak twawrzynczak@chromium.org --- M src/mainboard/google/hatch/Kconfig M src/mainboard/google/hatch/variants/kohaku/overridetree.cb 2 files changed, 102 insertions(+), 7 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/05/32405/5
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32405 )
Change subject: mb/google/kohaku: Update overridetree.cb ......................................................................
Patch Set 5:
(4 comments)
https://review.coreboot.org/#/c/32405/5/src/mainboard/google/hatch/variants/... File src/mainboard/google/hatch/variants/kohaku/overridetree.cb:
https://review.coreboot.org/#/c/32405/5/src/mainboard/google/hatch/variants/... PS5, Line 82: reset_gpio generic.
https://review.coreboot.org/#/c/32405/5/src/mainboard/google/hatch/variants/... PS5, Line 83: reset_delay_ms generic.
https://review.coreboot.org/#/c/32405/5/src/mainboard/google/hatch/variants/... PS5, Line 84: has_power_resource generic.
https://review.coreboot.org/#/c/32405/5/src/mainboard/google/hatch/variants/... PS5, Line 91: GPIO GPP?
Hello Paul Fagerburg, Shelley Chen, build bot (Jenkins), Furquan Shaikh,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/32405
to look at the new patch set (#6).
Change subject: mb/google/kohaku: Update overridetree.cb ......................................................................
mb/google/kohaku: Update overridetree.cb
Add common SoC config. Disable PCIe WiFi. Add digitizer. Turn off native SD card interface. No WWAN.
Add DA7219 driver to Kconfig.
BUG=b:130310626 BRANCH=none TEST=compiles (no Hatch ref or Kohaku device to test)
Change-Id: I17d5ba6ce4ec412384e4a1678474b8d26499ba40 Signed-off-by: Tim Wawrzynczak twawrzynczak@chromium.org --- M src/mainboard/google/hatch/Kconfig M src/mainboard/google/hatch/variants/baseboard/devicetree.cb M src/mainboard/google/hatch/variants/kohaku/overridetree.cb 3 files changed, 105 insertions(+), 8 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/05/32405/6
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32405 )
Change subject: mb/google/kohaku: Update overridetree.cb ......................................................................
Patch Set 6:
(5 comments)
https://review.coreboot.org/#/c/32405/6/src/mainboard/google/hatch/variants/... File src/mainboard/google/hatch/variants/baseboard/devicetree.cb:
https://review.coreboot.org/#/c/32405/6/src/mainboard/google/hatch/variants/... PS6, Line 204: nit: can you please move this clean up into the previous CL where sd_card_gpio is being moved out of baseboard devicetree?
https://review.coreboot.org/#/c/32405/6/src/mainboard/google/hatch/variants/... File src/mainboard/google/hatch/variants/kohaku/overridetree.cb:
https://review.coreboot.org/#/c/32405/6/src/mainboard/google/hatch/variants/... PS6, Line 32: } },
https://review.coreboot.org/#/c/32405/6/src/mainboard/google/hatch/variants/... PS6, Line 35: } },
https://review.coreboot.org/#/c/32405/6/src/mainboard/google/hatch/variants/... PS6, Line 41: } },
https://review.coreboot.org/#/c/32405/6/src/mainboard/google/hatch/variants/... PS6, Line 70: GPIO_D21_IRQ GPP_D21_IRQ
Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32405 )
Change subject: mb/google/kohaku: Update overridetree.cb ......................................................................
Patch Set 6:
(9 comments)
https://review.coreboot.org/#/c/32405/1/src/mainboard/google/hatch/variants/... File src/mainboard/google/hatch/variants/kohaku/overridetree.cb:
https://review.coreboot.org/#/c/32405/1/src/mainboard/google/hatch/variants/... PS1, Line 73: ACPI_IRQ_WAKE_EDGE_LOW
Ok, so should I comment out the wake pin for now?
Done
https://review.coreboot.org/#/c/32405/5/src/mainboard/google/hatch/variants/... File src/mainboard/google/hatch/variants/kohaku/overridetree.cb:
https://review.coreboot.org/#/c/32405/5/src/mainboard/google/hatch/variants/... PS5, Line 82: reset_gpio
generic.
Done
https://review.coreboot.org/#/c/32405/5/src/mainboard/google/hatch/variants/... PS5, Line 83: reset_delay_ms
generic.
Done
https://review.coreboot.org/#/c/32405/5/src/mainboard/google/hatch/variants/... PS5, Line 84: has_power_resource
generic.
Done
https://review.coreboot.org/#/c/32405/5/src/mainboard/google/hatch/variants/... PS5, Line 91: GPIO
GPP?
Done
https://review.coreboot.org/#/c/32405/6/src/mainboard/google/hatch/variants/... File src/mainboard/google/hatch/variants/kohaku/overridetree.cb:
https://review.coreboot.org/#/c/32405/6/src/mainboard/google/hatch/variants/... PS6, Line 32: }
},
Done
https://review.coreboot.org/#/c/32405/6/src/mainboard/google/hatch/variants/... PS6, Line 35: }
},
Done
https://review.coreboot.org/#/c/32405/6/src/mainboard/google/hatch/variants/... PS6, Line 41: }
},
Done
https://review.coreboot.org/#/c/32405/6/src/mainboard/google/hatch/variants/... PS6, Line 70: GPIO_D21_IRQ
GPP_D21_IRQ
Something must be wrong in my tree. I'm running "emerge-hatch coreboot" to build all the images, but obviously a typo like this should get caught... I need to figure out why the kohaku image isn't being compiled...
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32405 )
Change subject: mb/google/kohaku: Update overridetree.cb ......................................................................
Patch Set 6:
(1 comment)
https://review.coreboot.org/#/c/32405/6/src/mainboard/google/hatch/variants/... File src/mainboard/google/hatch/variants/kohaku/overridetree.cb:
https://review.coreboot.org/#/c/32405/6/src/mainboard/google/hatch/variants/... PS6, Line 70: GPIO_D21_IRQ
Something must be wrong in my tree. […]
You need to ensure that model.yaml gets updated for kohaku. emerge-hatch chromeos-config-bsp-hatch-private chromeos-config chromeos-bsp-hatch-private
Hello Paul Fagerburg, Shelley Chen, build bot (Jenkins), Furquan Shaikh,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/32405
to look at the new patch set (#7).
Change subject: mb/google/kohaku: Update overridetree.cb ......................................................................
mb/google/kohaku: Update overridetree.cb
Add common SoC config. Disable PCIe WiFi. Add digitizer. Turn off native SD card interface. No WWAN.
Add DA7219 driver to Kconfig.
BUG=b:130310626 BRANCH=none TEST=compiles (no Hatch ref or Kohaku device to test)
Change-Id: I17d5ba6ce4ec412384e4a1678474b8d26499ba40 Signed-off-by: Tim Wawrzynczak twawrzynczak@chromium.org --- M src/mainboard/google/hatch/Kconfig M src/mainboard/google/hatch/variants/baseboard/devicetree.cb M src/mainboard/google/hatch/variants/kohaku/overridetree.cb 3 files changed, 105 insertions(+), 8 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/05/32405/7
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32405 )
Change subject: mb/google/kohaku: Update overridetree.cb ......................................................................
Patch Set 7: Code-Review+2
Paul Fagerburg has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32405 )
Change subject: mb/google/kohaku: Update overridetree.cb ......................................................................
Patch Set 7: Code-Review+1
LGTM2
Hello Paul Fagerburg, Shelley Chen, build bot (Jenkins), Furquan Shaikh,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/32405
to look at the new patch set (#8).
Change subject: mb/google/kohaku: Update overridetree.cb ......................................................................
mb/google/kohaku: Update overridetree.cb
Add common SoC config. Disable PCIe WiFi. Add digitizer. Turn off native SD card interface. No WWAN.
Add DA7219 driver to Kconfig.
BUG=b:130310626 BRANCH=none TEST=compiles (no Hatch ref or Kohaku device to test)
Change-Id: I17d5ba6ce4ec412384e4a1678474b8d26499ba40 Signed-off-by: Tim Wawrzynczak twawrzynczak@chromium.org --- M src/mainboard/google/hatch/Kconfig M src/mainboard/google/hatch/variants/baseboard/devicetree.cb M src/mainboard/google/hatch/variants/kohaku/overridetree.cb 3 files changed, 104 insertions(+), 10 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/05/32405/8
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32405 )
Change subject: mb/google/kohaku: Update overridetree.cb ......................................................................
Patch Set 8: Code-Review+2
Furquan Shaikh has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/32405 )
Change subject: mb/google/kohaku: Update overridetree.cb ......................................................................
mb/google/kohaku: Update overridetree.cb
Add common SoC config. Disable PCIe WiFi. Add digitizer. Turn off native SD card interface. No WWAN.
Add DA7219 driver to Kconfig.
BUG=b:130310626 BRANCH=none TEST=compiles (no Hatch ref or Kohaku device to test)
Change-Id: I17d5ba6ce4ec412384e4a1678474b8d26499ba40 Signed-off-by: Tim Wawrzynczak twawrzynczak@chromium.org Reviewed-on: https://review.coreboot.org/c/coreboot/+/32405 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Furquan Shaikh furquan@google.com --- M src/mainboard/google/hatch/Kconfig M src/mainboard/google/hatch/variants/baseboard/devicetree.cb M src/mainboard/google/hatch/variants/kohaku/overridetree.cb 3 files changed, 104 insertions(+), 10 deletions(-)
Approvals: build bot (Jenkins): Verified Furquan Shaikh: Looks good to me, approved
diff --git a/src/mainboard/google/hatch/Kconfig b/src/mainboard/google/hatch/Kconfig index 63339f2..07ae7d2 100644 --- a/src/mainboard/google/hatch/Kconfig +++ b/src/mainboard/google/hatch/Kconfig @@ -3,6 +3,7 @@ def_bool n select DRIVERS_GENERIC_GPIO_KEYS select DRIVERS_GENERIC_MAX98357A + select DRIVERS_I2C_DA7219 select DRIVERS_I2C_GENERIC select DRIVERS_I2C_HID select DRIVERS_I2C_SX9310 diff --git a/src/mainboard/google/hatch/variants/baseboard/devicetree.cb b/src/mainboard/google/hatch/variants/baseboard/devicetree.cb index 3889d75..09e004e 100644 --- a/src/mainboard/google/hatch/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/hatch/variants/baseboard/devicetree.cb @@ -201,7 +201,7 @@ device pci 16.4 off end # Management Engine Interface 3 device pci 16.5 off end # Management Engine Interface 4 device pci 17.0 on end # SATA - device pci 19.0 on end #I2C #4 + device pci 19.0 on end # I2C #4 device pci 19.1 off end # I2C #5 device pci 19.2 off end # UART #2 device pci 1a.0 off end # eMMC diff --git a/src/mainboard/google/hatch/variants/kohaku/overridetree.cb b/src/mainboard/google/hatch/variants/kohaku/overridetree.cb index d564918..9546420 100644 --- a/src/mainboard/google/hatch/variants/kohaku/overridetree.cb +++ b/src/mainboard/google/hatch/variants/kohaku/overridetree.cb @@ -1,12 +1,11 @@ chip soc/intel/cannonlake - register "SerialIoDevMode" = "{ - [PchSerialIoIndexI2C0] = PchSerialIoPci, - [PchSerialIoIndexI2C1] = PchSerialIoPci, - [PchSerialIoIndexI2C2] = PchSerialIoPci, - [PchSerialIoIndexI2C3] = PchSerialIoPci, - [PchSerialIoIndexI2C4] = PchSerialIoPci, - [PchSerialIoIndexI2C5] = PchSerialIoPci, + [PchSerialIoIndexI2C0] = PchSerialIoPci, + [PchSerialIoIndexI2C1] = PchSerialIoPci, + [PchSerialIoIndexI2C2] = PchSerialIoPci, + [PchSerialIoIndexI2C3] = PchSerialIoPci, + [PchSerialIoIndexI2C4] = PchSerialIoPci, + [PchSerialIoIndexI2C5] = PchSerialIoPci, [PchSerialIoIndexSPI0] = PchSerialIoPci, [PchSerialIoIndexSPI1] = PchSerialIoPci, [PchSerialIoIndexSPI2] = PchSerialIoDisabled, @@ -15,7 +14,101 @@ [PchSerialIoIndexUART2] = PchSerialIoDisabled, }"
- device domain 0 on - end + # No PCIe WiFi + register "PcieRpEnable[13]" = "0"
+ # Intel Common SoC Config + #+-------------------+---------------------------+ + #| Field | Value | + #+-------------------+---------------------------+ + #| I2C0 | Trackpad | + #| I2C1 | Touchscreen | + #| I2C2 | Digitizer | + #| I2C4 | Audio | + #+-------------------+---------------------------+ + register "common_soc_config" = "{ + .i2c[0] = { + .speed = I2C_SPEED_FAST, + }, + .i2c[1] = { + .speed = I2C_SPEED_FAST, + }, + .i2c[2] = { + .speed = I2C_SPEED_FAST, + }, + .i2c[4] = { + .speed = I2C_SPEED_FAST, + }, + .gspi[0] = { + .speed_mhz = 1, + .early_init = 1, + }, + }" + + device domain 0 on + device pci 14.0 on + chip drivers/usb/acpi + device usb 0.0 on + chip drivers/usb/acpi + device usb 2.5 off end + end + chip drivers/usb/acpi + device usb 3.4 off end + end + end + end + end + device pci 14.5 off end # SDCard + + device pci 15.0 on + chip drivers/i2c/hid + register "generic.hid" = ""PNP0C50"" + register "generic.desc" = ""Synaptics Touchpad"" + # TODO: enable this when b/123967687 is fixed. + # register "generic.wake" = "GPE0_DW2_27" + # also set next line to ACPI_IRQ_WAKE_EDGE_LOW + register "generic.irq" = "ACPI_IRQ_EDGE_LOW(GPP_D21_IRQ)" + register "generic.probed" = "1" + register "hid_desc_reg_offset" = "0x20" + device i2c 0x2c on end + end + end # I2C 0 + + device pci 15.2 on + chip drivers/i2c/hid + register "generic.hid" = ""WCOM50C1"" + register "generic.desc" = ""WCOM Digitizer"" + register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_C7_IRQ)" + register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_A10)" + register "generic.reset_delay_ms" = "1" + register "generic.has_power_resource" = "1" + register "hid_desc_reg_offset" = "0x1" + device i2c 0x09 on end + end + end # I2C #2 + device pci 19.0 on + chip drivers/i2c/da7219 + # TODO: these settings were copied from another board + # with the same chip. verify the settings + register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_H0_IRQ)" + register "btn_cfg" = "50" + register "mic_det_thr" = "500" + register "jack_ins_deb" = "20" + register "jack_det_rate" = ""32ms_64ms"" + register "jack_rem_deb" = "1" + register "a_d_btn_thr" = "0xa" + register "d_b_btn_thr" = "0x16" + register "b_c_btn_thr" = "0x21" + register "c_mic_btn_thr" = "0x3e" + register "btn_avg" = "4" + register "adc_1bit_rpt" = "1" + register "micbias_lvl" = "2600" + register "mic_amp_in_sel" = ""diff"" + device i2c 0x1a on end + end + end + + # No PCIe WiFi + device pci 1d.5 off end + end # domain end
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build bot (Jenkins) (Code Review) -
Furquan Shaikh (Code Review)
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Paul Fagerburg (Code Review)
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Tim Wawrzynczak (Code Review)