Felix Singer has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/30898
Change subject: mb/supermicro/a2sdi-4c-hln4f: Add mainboard ......................................................................
mb/supermicro/a2sdi-4c-hln4f: Add mainboard
WIP
Change-Id: Ibdd8a831db095efdcfcc458f6373c78a8c23ac9e Signed-off-by: Felix Singer migy@darmstadt.ccc.de --- A src/mainboard/supermicro/a2sdi-4c-hln4f/Kconfig A src/mainboard/supermicro/a2sdi-4c-hln4f/Kconfig.name A src/mainboard/supermicro/a2sdi-4c-hln4f/Makefile.inc A src/mainboard/supermicro/a2sdi-4c-hln4f/acpi/mainboard.asl A src/mainboard/supermicro/a2sdi-4c-hln4f/acpi/mainboard_pci_irqs.asl A src/mainboard/supermicro/a2sdi-4c-hln4f/acpi/platform.asl A src/mainboard/supermicro/a2sdi-4c-hln4f/acpi/thermal.asl A src/mainboard/supermicro/a2sdi-4c-hln4f/acpi_tables.c A src/mainboard/supermicro/a2sdi-4c-hln4f/board_info.txt A src/mainboard/supermicro/a2sdi-4c-hln4f/devicetree.cb A src/mainboard/supermicro/a2sdi-4c-hln4f/dsdt.asl A src/mainboard/supermicro/a2sdi-4c-hln4f/fadt.c A src/mainboard/supermicro/a2sdi-4c-hln4f/ramstage.c 13 files changed, 197 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/98/30898/1
diff --git a/src/mainboard/supermicro/a2sdi-4c-hln4f/Kconfig b/src/mainboard/supermicro/a2sdi-4c-hln4f/Kconfig new file mode 100644 index 0000000..3dccb78 --- /dev/null +++ b/src/mainboard/supermicro/a2sdi-4c-hln4f/Kconfig @@ -0,0 +1,41 @@ +if BOARD_SUPERMICRO_A2SDI_4C_HLN4F + +config BOARD_SPECIFIC_OPTIONS + def_bool y + select SOC_INTEL_DENVERTON_NS + select BOARD_ROMSIZE_KB_16384 + select HAVE_ACPI_TABLES + +config MAINBOARD_DIR + string + default supermicro/a2sdi-4c-hln4f + +config MAINBOARD_PART_NUMBER + string + default "A2SDI-4C-HLN4F" + +config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID + hex + default 0x15d9 + +config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID + hex + default 0x0969 + +config CBFS_SIZE + hex + default 0x800000 + +config DIMM_MAX + int + default 4 + +config DIMM_SPD_SIZE + int + default 512 + +config PXE_ROM_ID + string + default "8086,15e4" + +endif diff --git a/src/mainboard/supermicro/a2sdi-4c-hln4f/Kconfig.name b/src/mainboard/supermicro/a2sdi-4c-hln4f/Kconfig.name new file mode 100644 index 0000000..ee8992a --- /dev/null +++ b/src/mainboard/supermicro/a2sdi-4c-hln4f/Kconfig.name @@ -0,0 +1,2 @@ +config BOARD_SUPERMICRO_A2SDI_4C_HLN4F + bool "A2SDI-4C-HLN4F" diff --git a/src/mainboard/supermicro/a2sdi-4c-hln4f/Makefile.inc b/src/mainboard/supermicro/a2sdi-4c-hln4f/Makefile.inc new file mode 100644 index 0000000..0d1aea5 --- /dev/null +++ b/src/mainboard/supermicro/a2sdi-4c-hln4f/Makefile.inc @@ -0,0 +1 @@ +ramstage-y += ramstage.c diff --git a/src/mainboard/supermicro/a2sdi-4c-hln4f/acpi/mainboard.asl b/src/mainboard/supermicro/a2sdi-4c-hln4f/acpi/mainboard.asl new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/src/mainboard/supermicro/a2sdi-4c-hln4f/acpi/mainboard.asl diff --git a/src/mainboard/supermicro/a2sdi-4c-hln4f/acpi/mainboard_pci_irqs.asl b/src/mainboard/supermicro/a2sdi-4c-hln4f/acpi/mainboard_pci_irqs.asl new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/src/mainboard/supermicro/a2sdi-4c-hln4f/acpi/mainboard_pci_irqs.asl diff --git a/src/mainboard/supermicro/a2sdi-4c-hln4f/acpi/platform.asl b/src/mainboard/supermicro/a2sdi-4c-hln4f/acpi/platform.asl new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/src/mainboard/supermicro/a2sdi-4c-hln4f/acpi/platform.asl diff --git a/src/mainboard/supermicro/a2sdi-4c-hln4f/acpi/thermal.asl b/src/mainboard/supermicro/a2sdi-4c-hln4f/acpi/thermal.asl new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/src/mainboard/supermicro/a2sdi-4c-hln4f/acpi/thermal.asl diff --git a/src/mainboard/supermicro/a2sdi-4c-hln4f/acpi_tables.c b/src/mainboard/supermicro/a2sdi-4c-hln4f/acpi_tables.c new file mode 100644 index 0000000..48deb5f --- /dev/null +++ b/src/mainboard/supermicro/a2sdi-4c-hln4f/acpi_tables.c @@ -0,0 +1,24 @@ +#include <types.h> +#include <string.h> +#include <cbmem.h> +#include <console/console.h> +#include <arch/acpi.h> +#include <arch/ioapic.h> +#include <arch/acpigen.h> +#include <arch/smp/mpspec.h> +#include <device/device.h> +#include <device/pci.h> +#include <device/pci_ids.h> +#include <cpu/cpu.h> +#include <cpu/x86/msr.h> +#include <soc/acpi.h> +#include <soc/nvs.h> + +void acpi_create_gnvs(global_nvs_t *gnvs) +{ +} + +unsigned long acpi_fill_madt(unsigned long current) +{ + return current; +} diff --git a/src/mainboard/supermicro/a2sdi-4c-hln4f/board_info.txt b/src/mainboard/supermicro/a2sdi-4c-hln4f/board_info.txt new file mode 100644 index 0000000..1d9347f --- /dev/null +++ b/src/mainboard/supermicro/a2sdi-4c-hln4f/board_info.txt @@ -0,0 +1,8 @@ +Vendor name: Supermicro +Board name: N130WU +Category: Server +Release year: 2018 +ROM package: SOIC-16 +ROM protocol: SPI +ROM socketed: n +Flashrom support: y diff --git a/src/mainboard/supermicro/a2sdi-4c-hln4f/devicetree.cb b/src/mainboard/supermicro/a2sdi-4c-hln4f/devicetree.cb new file mode 100644 index 0000000..419d651 --- /dev/null +++ b/src/mainboard/supermicro/a2sdi-4c-hln4f/devicetree.cb @@ -0,0 +1,74 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2014 - 2017 Intel Corporation. +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; version 2 of the License. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +chip soc/intel/denverton_ns + + # configure pirq routing + register "pirqa_routing" = "11" + register "pirqb_routing" = "10" + register "pirqc_routing" = "06" + register "pirqd_routing" = "07" + register "pirqe_routing" = "12" + register "pirqf_routing" = "14" + register "pirqg_routing" = "15" + register "pirqh_routing" = "15" + + # configure device interrupt routing + register "ir00_routing" = "0x3217" # IR00, Dev31 + register "ir01_routing" = "0x3210" # IR01, Dev22 + register "ir02_routing" = "0x3211" # IR02, Dev23 + register "ir03_routing" = "0x3217" # IR03, Dev5 + register "ir04_routing" = "0x3212" # IR04, Dev6 + register "ir05_routing" = "0x3210" # IR05, Dev24 + register "ir06_routing" = "0x3214" # IR06, Dev19 + register "ir07_routing" = "0x3210" # IR07, Dev9/10/11/12 + register "ir08_routing" = "0x7654" # IR08, Dev14/15/16/17 + register "ir09_routing" = "0x3213" # IR09, Dev21 + register "ir10_routing" = "0x3210" # IR10, Dev26/18 + register "ir11_routing" = "0x3215" # IR11, Dev20 + register "ir12_routing" = "0x3210" # IR12, Dev27 + + # configure interrupt polarity control + register "ipc0" = "0x00ff4000" # IPC0, PIRQA-H (IRQ16-23) should always be ActiveLow + register "ipc1" = "0x00000000" # IPC1 + register "ipc2" = "0x00000000" # IPC2 + register "ipc3" = "0x00000000" # IPC3 + + device cpu_cluster 0 on + device lapic 0 on end + end + device domain 0 on + device pci 00.0 on end # Host Bridge + device pci 04.0 on end # RAS + device pci 05.0 on end # RCEC(Root Complex Event Collector) + device pci 06.0 on end # Virtual root port 2 (QAT) + device pci 09.0 on end # PCI Express Port 0, cluster #0, x8 + device pci 0e.0 on end # PCI Express Port 4, cluster #1, x4 + device pci 10.0 on end # PCI Express Port 6, cluster #1, x4 + device pci 12.0 on end # SMBus Controller 1 + device pci 14.0 on end # SATA Controller 1 + device pci 15.0 on end # XHCI USB Controller + device pci 16.0 on end # Virtual root port 0 (10GBE0) + device pci 17.0 on end # Virtual root port 1 (10GBE1) + device pci 18.0 on end # CSME HECI 1 + device pci 1a.0 on end # UART 0 + device pci 1a.1 on end # UART 1 + device pci 1a.2 on end # UART 2 + device pci 1c.0 on end # eMMC + device pci 1f.0 on end # LPC bridge + device pci 1f.2 on end # PMC/ACPI + device pci 1f.4 on end # SMBus Controller 0 + device pci 1f.5 on end # SPI Controller + end +end diff --git a/src/mainboard/supermicro/a2sdi-4c-hln4f/dsdt.asl b/src/mainboard/supermicro/a2sdi-4c-hln4f/dsdt.asl new file mode 100644 index 0000000..91ade69 --- /dev/null +++ b/src/mainboard/supermicro/a2sdi-4c-hln4f/dsdt.asl @@ -0,0 +1,34 @@ +DefinitionBlock( + "dsdt.aml", + "DSDT", + 0x02, // DSDT revision: ACPI v2.0 + "COREv4", // OEM id + "COREBOOT", // OEM table id + 0x20110725 // OEM revision +) +{ + // Some generic macros + #include "acpi/platform.asl" + #include "acpi/mainboard.asl" + + // General Purpose Events + //#include "acpi/gpe.asl" + + // Thermal Handler + #include "acpi/thermal.asl" + + // global NVS and variables + #include <soc/intel/denverton_ns/acpi/globalnvs.asl> + #include <cpu/intel/common/acpi/cpu.asl> + + Scope (_SB) { + Device (PCI0) + { + #include <soc/intel/denverton_ns/acpi/northcluster.asl> + #include <soc/intel/denverton_ns/acpi/southcluster.asl> + } + } + + /* Chipset specific sleep states */ + #include <soc/intel/denverton_ns/acpi/sleepstates.asl> +} diff --git a/src/mainboard/supermicro/a2sdi-4c-hln4f/fadt.c b/src/mainboard/supermicro/a2sdi-4c-hln4f/fadt.c new file mode 100644 index 0000000..8041641 --- /dev/null +++ b/src/mainboard/supermicro/a2sdi-4c-hln4f/fadt.c @@ -0,0 +1,8 @@ +#include <string.h> +#include <arch/acpi.h> +#include <soc/acpi.h> +#include <soc/soc_util.h> + +void acpi_create_fadt(acpi_fadt_t *fadt, acpi_facs_t *facs, void *dsdt) +{ +} diff --git a/src/mainboard/supermicro/a2sdi-4c-hln4f/ramstage.c b/src/mainboard/supermicro/a2sdi-4c-hln4f/ramstage.c new file mode 100644 index 0000000..134dfd5f --- /dev/null +++ b/src/mainboard/supermicro/a2sdi-4c-hln4f/ramstage.c @@ -0,0 +1,5 @@ +#include <soc/ramstage.h> + +void mainboard_silicon_init_params(FSPS_UPD *params) +{ +}
Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30898 )
Change subject: mb/supermicro/a2sdi-4c-hln4f: Add mainboard ......................................................................
Patch Set 1:
This change is ready for review.
-
Felix Singer (Code Review)