Change in ...coreboot[master]: qcs405: Clear bss for bootblock

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[e-mail] has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/29971


Change subject: qcs405: Clear bss for bootblock
......................................................................

qcs405: Clear bss for bootblock

Looks like bss is not zero cleared, resulting in
unintialized section to have junk data values. So clear it up
before jumping to 'C' code.

Change-Id: I1b751ced2c948f45a7b365b695eb95869dfcdc29
Signed-off-by: Nitheesh Sekar <[e-mail]>
Signed-off-by: Sricharan R <[e-mail]>
---
M src/arch/arm64/armv8/cpu.S
1 file changed, 9 insertions(+), 0 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/71/29971/1

diff --git a/src/arch/arm64/armv8/cpu.S b/src/arch/arm64/armv8/cpu.S
index 935f1fe..d3fd9d3 100644
--- a/src/arch/arm64/armv8/cpu.S
+++ b/src/arch/arm64/armv8/cpu.S
@@ -141,6 +141,15 @@
 	dsb	sy
 	isb
 
+	/* Finally clear the bss here */
+	ldr	x1, =_bss
+	ldr	x2, =_ebss
+	mov	x0, #0
+2:
+	stp	x0, x0, [x1], #16
+	cmp	x1, x2
+	bne	2b
+
 	/* Initialize stack with sentinel value to later check overflow. */
 	ldr	x2, =0xdeadbeefdeadbeef
 	ldr	x0, =_stack

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I1b751ced2c948f45a7b365b695eb95869dfcdc29
Gerrit-Change-Number: 29971
Gerrit-PatchSet: 1
Gerrit-Owner: [e-mail]
Gerrit-Reviewer: Julius Werner <[e-mail]>
Gerrit-Reviewer: [e-mail]
Gerrit-MessageType: newchange