[XS] Change in coreboot[main]: soc/intel/ptl: Disable FSP_UGOP_EARLY_SIGN_OF_LIFE for PTL

[Jayvik Desai (Code Review)]

Jayvik Desai has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/86314?usp=email )

Change subject: soc/intel/ptl: Disable FSP_UGOP_EARLY_SIGN_OF_LIFE for PTL
......................................................................

soc/intel/ptl: Disable FSP_UGOP_EARLY_SIGN_OF_LIFE for PTL

Disable ESOL for PTL until the feature is ready and tested.

BUG=none
TEST=emerge-fatcat coreboot
BRANCH=none

Change-Id: I99dd516816995b6cdfdcec618c06c7dbe061718a
Signed-off-by: Jayvik Desai 
---
M src/soc/intel/pantherlake/Kconfig
1 file changed, 0 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/14/86314/1

diff --git a/src/soc/intel/pantherlake/Kconfig b/src/soc/intel/pantherlake/Kconfig
index dde401b..5326020 100644
--- a/src/soc/intel/pantherlake/Kconfig
+++ b/src/soc/intel/pantherlake/Kconfig
@@ -17,7 +17,6 @@
    select FAST_SPI_SUPPORTS_EXT_BIOS_WINDOW
    select FSP_COMPRESS_FSP_S_LZ4
    select FSP_M_XIP
-	select FSP_UGOP_EARLY_SIGN_OF_LIFE
    select FSP_USES_CB_DEBUG_EVENT_HANDLER
    select FSPS_HAS_ARCH_UPD
    select GENERIC_GPIO_LIB