[M] Change in coreboot[main]: drivers/intel/fsp2_0: Add FSP 2.4 support

[Subrata Banik (Code Review)]

Attention is currently required from: Andrey Petrov, Bora Guvendik, Jérémy Compostella, Ronak Kanabar, Wonkyu Kim.

Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/80275?usp=email )

Change subject: drivers/intel/fsp2_0: Add FSP 2.4 support
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Patch Set 3:

(7 comments)

Patchset:

PS3: 
some more generic feedback,

FSPM_ARCH2_UPD should need a EDK2 uprev. Please submit that as well as base CL.

Until things are not in place, I suggest to mark this CL as WIP

File src/drivers/intel/fsp2_0/memory_init.c:

https://review.coreboot.org/c/coreboot/+/80275/comment/2168fd69_3e20357e :
PS3, Line 32: void __weak platform_fsp_multi_phase_init_cb(uint32_t phase_index)
nit:

platform_fsp_multi_phase_mem_init_cb

https://review.coreboot.org/c/coreboot/+/80275/comment/01d3d332_2dba7f2e :
PS3, Line 282: error_handler
nit:
fsp_memory_init_error_handler

https://review.coreboot.org/c/coreboot/+/80275/comment/e9908f37_501195f9 :
PS3, Line 295: 
             : #if CONFIG(PLATFORM_USES_FSP2_4)
i don't believe u need this. we don't see this inside silicon_init.c

https://review.coreboot.org/c/coreboot/+/80275/comment/ff0cbc1d_e7f970df :
PS3, Line 297: multi_phase_init
nit: multi_phase_mem_init

https://review.coreboot.org/c/coreboot/+/80275/comment/42273947_dc46d6fb :
PS3, Line 437: 	if (hdr->fsp_multi_phase_mem_init_entry_offset)
why not like this ?

```
       ....
    /* Implementing multi_phase_mem_init() is optional till < FSP 2.4 spec */
    if (hdr->fsp_multi_phase_mem_init_entry_offset == NULL)
    	return;

multi_phase_mem_init(hdr);
       ....
```

File src/drivers/intel/fsp2_0/silicon_init.c:

https://review.coreboot.org/c/coreboot/+/80275/comment/d30e3cfe_533c148d :
PS3, Line 25: platform_fsp_multi_phase_init_cb
nit:
platform_fsp_multi_phase_si_init_cb