[XS] Change in coreboot[master]: soc/intel/xeon_sp: Use MRC_STASH_TO_CBMEM config

[Martin L Roth (Code Review)]

Attention is currently required from: Andrey Petrov, Arthur Heymans, Christian Walter, Johnny Lin, Kapil Porwal, Lean Sheng Tan, Nill Ge, Reka Norman, Shuo Liu, Subrata Banik, TangYiwei, Tim Chu.

Martin L Roth has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/77557?usp=email )

Change subject: soc/intel/xeon_sp: Use MRC_STASH_TO_CBMEM config
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Patch Set 3:

(1 comment)

Commit Message:

https://review.coreboot.org/c/coreboot/+/77557/comment/54e410b8_6e7ddaa1 :
PS3, Line 19: 
This block is really hard to read because of wrapping. Can we use this instead?

```
w/o this patch:

|            | Save MRC Cache | Finalize Cache | Lock Boot Medium |
+------------+----------------+----------------+------------------+
| MRC_STASH  | BS_DEV         | BS_DEV         | BS_DEV           | 
| TO_CBMEM   | ENUMERATE_EXIT | ENUMERATE_EXIT | RESOURCES_ENTRY  |
+------------+----------------+----------------+------------------+
| SAVE_MRC   | BS_DEV_INIT    | BS_DEV         | BS_DEV           |
| AFTER_FSPS | CHIPS_EXIT     | ENUMERATE_EXIT | RESOURCES_ENTRY  |

w/ this patch:

|            | Save MRC Cache | Finalize Cache | Lock Boot Medium |
+------------+----------------+----------------+------------------+
| MRC_STASH  | BS_DEV         | BS_DEV         | BS_DEV           |
| TO_CBMEM   | ENUMERATE_EXIT | ENUMERATE_EXIT | RESOURCES_ENTRY  |
```