Attention is currently required from: Jason Glenesk, Marshall Dawson, Eric Peers, Yu-hsuan Hsu, Karthik Ramasubramanian, Felix Held. Hello build bot (Jenkins), Jason Glenesk, Marshall Dawson, Felix Held,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/51556
to look at the new patch set (#3).
Change subject: soc/amd/cezanne: Generate PCI routing table ......................................................................
soc/amd/cezanne: Generate PCI routing table
We use the FSP PCI routing HOB to construct the ACPI _PRT table. This code was based off of picasso's pcie_gpp.c. The eventual goal is to make picasso's FSP export the same HOB and then we can move this code into amd/common.
BUG=b:184766519 TEST=Dump guybrush ACPI table and verify it looks correct.
Signed-off-by: Raul E Rangel rrangel@chromium.org Change-Id: Idb559335435a95e73640e6d7fb224e16e0592326 --- A src/soc/amd/cezanne/acpi/pci_int.asl M src/soc/amd/cezanne/acpi/soc.asl M src/soc/amd/cezanne/pcie_gpp.c 3 files changed, 306 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/56/51556/3