Change in coreboot[master]: [UNTESTED] soc/intel/apl: enable ACPI CPPC entries - coreboot-gerrit

25 Dec 2020


      Matt DeVillier has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47542 )
Change subject: [UNTESTED] soc/intel/apl: enable ACPI CPPC entries
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Patch Set 10:
No entries are generated on google/ampton with this patch due to it not supporting Speedshift (cpuid_eax(6) & CPUID_6_EAX_ISST == 0) and I don't have another APL/GLK device which does support it to test
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Ic94d95413d2f7f6743507824d47d5afd9fdfbbb9
Gerrit-Change-Number: 47542
Gerrit-PatchSet: 10
Gerrit-Owner: Michael Niewöhner foss@mniewoehner.de
Gerrit-Reviewer:  Felix Singer felixsinger@posteo.net
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Gerrit-Reviewer: Furquan Shaikh furquan@google.com
Gerrit-Reviewer: Matt DeVillier matt.devillier@gmail.com
Gerrit-Reviewer: Matt Delco delco@chromium.org
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Gerrit-Comment-Date: Fri, 25 Dec 2020 00:36:53 +0000
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