Change in coreboot[master]: purism/librem13v2: Add memory init code

[Youness Alaoui (Code Review)]

Youness Alaoui has uploaded a new change for review. ( https://review.coreboot.org/19935 )

Change subject: purism/librem13v2: Add memory init code
......................................................................

purism/librem13v2: Add memory init code

Adding code to setup the spd information from sodimm.
Adapted from intel/kblrvp.

Change-Id: I0403f999dac1bdef0e9e1abe7c9c62407e223bb1
Signed-off-by: Youness Alaoui 
---
M src/mainboard/purism/librem13v2/Kconfig
M src/mainboard/purism/librem13v2/romstage.c
2 files changed, 40 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/35/19935/1

diff --git a/src/mainboard/purism/librem13v2/Kconfig b/src/mainboard/purism/librem13v2/Kconfig
index f3cbffc..dd152ad 100644
--- a/src/mainboard/purism/librem13v2/Kconfig
+++ b/src/mainboard/purism/librem13v2/Kconfig
@@ -47,4 +47,13 @@
    string
    default "8086,1916"

+config DIMM_MAX
+	int
+	default 1
+
+config DIMM_SPD_SIZE
+	int
+	default 512
+
+
 endif
diff --git a/src/mainboard/purism/librem13v2/romstage.c b/src/mainboard/purism/librem13v2/romstage.c
index da1c4c3..f713dec 100644
--- a/src/mainboard/purism/librem13v2/romstage.c
+++ b/src/mainboard/purism/librem13v2/romstage.c
@@ -20,6 +20,7 @@
 #include <soc/pei_data.h>
 #include <soc/pei_wrapper.h>
 #include <soc/romstage.h>
+#include <spd_bin.h>

void mainboard_romstage_entry(struct romstage_params *params)
 {
@@ -28,3 +29,33 @@
    /* Initliaze memory */
    romstage_common(params);
 }
+
+void mainboard_memory_init_params(struct romstage_params *params,
+	MEMORY_INIT_UPD *memory_params)
+{
+	struct spd_block blk;
+
+	memory_params->DqPinsInterleaved = 1;
+	get_spd_smbus(&blk);
+	dump_spd_info(&blk);
+	memory_params->MemorySpdDataLen = blk.len;
+	if (blk.spd_array[0][0] != 0)
+		memory_params->MemorySpdPtr00 = (u32)blk.spd_array[0];
+	memory_params->MemorySpdPtr01 = 0;
+	memory_params->MemorySpdPtr10 = 0;
+	memory_params->MemorySpdPtr11 = 0;
+
+	memcpy(memory_params->DqByteMapCh0, params->pei_data->dq_map[0],
+		sizeof(params->pei_data->dq_map[0]));
+	memcpy(memory_params->DqByteMapCh1, params->pei_data->dq_map[1],
+		sizeof(params->pei_data->dq_map[1]));
+	memcpy(memory_params->DqsMapCpu2DramCh0, params->pei_data->dqs_map[0],
+		sizeof(params->pei_data->dqs_map[0]));
+	memcpy(memory_params->DqsMapCpu2DramCh1, params->pei_data->dqs_map[1],
+		sizeof(params->pei_data->dqs_map[1]));
+	memcpy(memory_params->RcompResistor, params->pei_data->RcompResistor,
+		sizeof(params->pei_data->RcompResistor));
+	memcpy(memory_params->RcompTarget, params->pei_data->RcompTarget,
+		sizeof(params->pei_data->RcompTarget));
+
+}