Attention is currently required from: Patrick Rudolph.
Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78228?usp=email )
Change subject: sb/intel/bd82x6x: Improve SLCAP ......................................................................
Patch Set 1:
(2 comments)
File src/southbridge/intel/bd82x6x/pch.h:
https://review.coreboot.org/c/coreboot/+/78228/comment/343a5deb_c24a22e2 : PS1, Line 90: #define D28Fx_SLCAP 0x54 ``` #define PCI_EXP_SLTCAP 20 /* Slot Capabilities */ ```
File src/southbridge/intel/bd82x6x/pcie.c:
https://review.coreboot.org/c/coreboot/+/78228/comment/42c2876a_14f0e31e : PS1, Line 141: reg32 = pci_read_config32(dev, D28Fx_SLCAP); Probably should utilise and extend ones from pci_def.h here.
``` #define PCI_EXP_SLTCAP 20 /* Slot Capabilities */ #define PCI_EXP_SLTCAP_HPC 0x0040 /* Hot-Plug Capable */ #define PCI_EXP_SLTCAP_PSN 0xfff80000 /* Physical Slot Number */ ```