[S] Change in coreboot[main]: soc/mediatek/mt8196: Add mtk-fsp loader in romstage

[Yidi Lin (Code Review)]

Yidi Lin has submitted this change. ( https://review.coreboot.org/c/coreboot/+/86014?usp=email )

(

3 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the submitted one.
 )Change subject: soc/mediatek/mt8196: Add mtk-fsp loader in romstage
......................................................................

soc/mediatek/mt8196: Add mtk-fsp loader in romstage

Reserve 64KB memory at 0x02140000 for mtk_fsp_romstage.elf.

BUG=b:373797027
TEST=build pass

Signed-off-by: Jarried Lin 
Change-Id: I73710227e6d9e3f0c717e17db0cc798265eb1f72
Reviewed-on: https://review.coreboot.org/c/coreboot/+/86014
Reviewed-by: Yidi Lin 
Reviewed-by: Yu-Ping Wu 
Tested-by: build bot (Jenkins) 
---
M src/soc/mediatek/common/include/soc/memlayout.h
M src/soc/mediatek/mt8196/Makefile.mk
M src/soc/mediatek/mt8196/include/soc/memlayout.ld
3 files changed, 12 insertions(+), 0 deletions(-)

Approvals:
  Yu-Ping Wu: Looks good to me, approved
  build bot (Jenkins): Verified
  Yidi Lin: Looks good to me, approved

diff --git a/src/soc/mediatek/common/include/soc/memlayout.h b/src/soc/mediatek/common/include/soc/memlayout.h
index 9e5f11b..5bb5c38 100644
--- a/src/soc/mediatek/common/include/soc/memlayout.h
+++ b/src/soc/mediatek/common/include/soc/memlayout.h
@@ -18,6 +18,9 @@
    _ = ASSERT(size % 4K == 0, \
    	"DRAM DMA buffer should be multiple of smallest page size (4K)!");

+#define FSP_ROMSTAGE_INIT_CODE(addr, size) \
+	REGION(fsp_romstage_init_code, addr, size, 64K)
+
 #define FSP_RAMSTAGE_INIT_CODE(addr, size) \
    REGION(fsp_ramstage_init_code, addr, size, 64K)

diff --git a/src/soc/mediatek/mt8196/Makefile.mk b/src/soc/mediatek/mt8196/Makefile.mk
index 84bf3b6..80dac20 100644
--- a/src/soc/mediatek/mt8196/Makefile.mk
+++ b/src/soc/mediatek/mt8196/Makefile.mk
@@ -97,6 +97,14 @@
 $(DRAM_CBFS)-compression := $(CBFS_PRERAM_COMPRESS_FLAG)
 cbfs-files-y += $(DRAM_CBFS)

+FSP_ROMSTAGE_CBFS := $(CONFIG_CBFS_PREFIX)/mtk_fsp_romstage
+$(FSP_ROMSTAGE_CBFS)-file := $(MT8196_BLOB_DIR)/mtk_fsp_romstage.elf
+$(FSP_ROMSTAGE_CBFS)-type := stage
+$(FSP_ROMSTAGE_CBFS)-compression := $(CBFS_PRERAM_COMPRESS_FLAG)
+ifneq ($(wildcard $($(FSP_ROMSTAGE_CBFS)-file)),)
+cbfs-files-y += $(FSP_ROMSTAGE_CBFS)
+endif
+
 FSP_RAMSTAGE_CBFS := $(CONFIG_CBFS_PREFIX)/mtk_fsp_ramstage
 $(FSP_RAMSTAGE_CBFS)-file := $(MT8196_BLOB_DIR)/mtk_fsp_ramstage.elf
 $(FSP_RAMSTAGE_CBFS)-type := stage
diff --git a/src/soc/mediatek/mt8196/include/soc/memlayout.ld b/src/soc/mediatek/mt8196/include/soc/memlayout.ld
index 6c35a47..74f1543 100644
--- a/src/soc/mediatek/mt8196/include/soc/memlayout.ld
+++ b/src/soc/mediatek/mt8196/include/soc/memlayout.ld
@@ -57,6 +57,7 @@
    OVERLAP_DECOMPRESSOR_VERSTAGE_ROMSTAGE(0x02096000, 272K)
    PRERAM_CBFS_CACHE(0x020DA000, 48K)
    PRERAM_CBMEM_CONSOLE(0x020E6000, 340K)
+	FSP_ROMSTAGE_INIT_CODE(0x02140000, 64K)
    SRAM_L2C_END(0x02200000)

DRAM_START(0x80000000)