Wonkyu Kim has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/63170 )
Change subject: intel/common/block: move gpmr api to gpmr driver ......................................................................
intel/common/block: move gpmr api to gpmr driver
As gpmr api is not DMI specific, move api to gpmr driver
Signed-off-by: Wonkyu Kim wonkyu.kim@intel.com Change-Id: I4d57f4b8bd06e0cf6c9afa4baf4a7bed64ecb56b --- D src/soc/intel/common/block/dmi/Kconfig D src/soc/intel/common/block/dmi/Makefile.inc D src/soc/intel/common/block/dmi/dmi.c M src/soc/intel/common/block/fast_spi/fast_spi.c A src/soc/intel/common/block/gpmr/Makefile.inc A src/soc/intel/common/block/gpmr/gpmr.c M src/soc/intel/common/block/include/intelblocks/dmi.h A src/soc/intel/common/block/include/intelblocks/gpmr.h 8 files changed, 84 insertions(+), 100 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/70/63170/1
diff --git a/src/soc/intel/common/block/dmi/Kconfig b/src/soc/intel/common/block/dmi/Kconfig deleted file mode 100644 index 2cc4646..0000000 --- a/src/soc/intel/common/block/dmi/Kconfig +++ /dev/null @@ -1,5 +0,0 @@ -config SOC_INTEL_COMMON_BLOCK_DMI - bool - select SOC_INTEL_COMMON_BLOCK_PCR - help - Intel Processor common DMI support diff --git a/src/soc/intel/common/block/dmi/Makefile.inc b/src/soc/intel/common/block/dmi/Makefile.inc deleted file mode 100644 index 7d013c9..0000000 --- a/src/soc/intel/common/block/dmi/Makefile.inc +++ /dev/null @@ -1,7 +0,0 @@ -ifeq ($(CONFIG_SOC_INTEL_COMMON_BLOCK_DMI), y) - -bootblock-y += dmi.c -romstage-y += dmi.c -ramstage-y += dmi.c - -endif diff --git a/src/soc/intel/common/block/dmi/dmi.c b/src/soc/intel/common/block/dmi/dmi.c deleted file mode 100644 index 1a3a602..0000000 --- a/src/soc/intel/common/block/dmi/dmi.c +++ /dev/null @@ -1,81 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include <console/console.h> -#include <intelblocks/dmi.h> -#include <intelblocks/pcr.h> -#include <soc/pcr_ids.h> - -#define MAX_GPMR_REGS 3 - -#define GPMR_OFFSET(x) (0x277c + (x) * 8) -#define DMI_PCR_GPMR_LIMIT_MASK 0xffff0000 -#define DMI_PCR_GPMR_BASE_SHIFT 16 -#define DMI_PCR_GPMR_BASE_MASK 0xffff - -#define GPMR_DID_OFFSET(x) (0x2780 + (x) * 8) -#define DMI_PCR_GPMR_EN BIT(31) - -/* GPMR Register read given offset */ -static uint32_t gpmr_read32(uint16_t offset) -{ - return pcr_read32(PID_DMI, offset); -} - -/* GPMR Register write given offset and val */ -static void gpmr_write32(uint16_t offset, uint32_t val) -{ - return pcr_write32(PID_DMI, offset, val); -} - -/* Check for available free gpmr */ -static int get_available_gpmr(void) -{ - int i; - uint32_t val; - - for (i = 0; i < MAX_GPMR_REGS; i++) { - val = gpmr_read32(GPMR_DID_OFFSET(i)); - if (!(val & DMI_PCR_GPMR_EN)) - return i; - } - printk(BIOS_ERR, "%s: No available free gpmr found\n", __func__); - return CB_ERR; -} - -/* Configure GPMR for the given base and size of extended BIOS Region */ -enum cb_err dmi_enable_gpmr(uint32_t base, uint32_t size, uint32_t dest_id) -{ - int gpmr_num; - uint32_t limit; - - if (base & ~(DMI_PCR_GPMR_BASE_MASK << DMI_PCR_GPMR_BASE_SHIFT)) { - printk(BIOS_ERR, "base is not 64-KiB aligned!\n"); - return CB_ERR; - } - - limit = base + (size - 1); - - if (limit < base) { - printk(BIOS_ERR, "Invalid limit: limit cannot be less than base!\n"); - return CB_ERR; - } - - if ((limit & ~DMI_PCR_GPMR_LIMIT_MASK) != 0xffff) { - printk(BIOS_ERR, "limit does not end on a 64-KiB boundary!\n"); - return CB_ERR; - } - - /* Get available free GPMR */ - gpmr_num = get_available_gpmr(); - if (gpmr_num == CB_ERR) - return CB_ERR; - - /* Program Range for the given decode window */ - gpmr_write32(GPMR_OFFSET(gpmr_num), (limit & DMI_PCR_GPMR_LIMIT_MASK) | - ((base >> DMI_PCR_GPMR_BASE_SHIFT) & DMI_PCR_GPMR_BASE_MASK)); - - /* Program source decode enable bit and the Destination ID */ - gpmr_write32(GPMR_DID_OFFSET(gpmr_num), dest_id | DMI_PCR_GPMR_EN); - - return CB_SUCCESS; -} diff --git a/src/soc/intel/common/block/fast_spi/fast_spi.c b/src/soc/intel/common/block/fast_spi/fast_spi.c index 7be71a2..f0c288c 100644 --- a/src/soc/intel/common/block/fast_spi/fast_spi.c +++ b/src/soc/intel/common/block/fast_spi/fast_spi.c @@ -10,7 +10,7 @@ #include <commonlib/helpers.h> #include <cpu/x86/mtrr.h> #include <fast_spi_def.h> -#include <intelblocks/dmi.h> +#include <intelblocks/gpmr.h> #include <intelblocks/fast_spi.h> #include <lib.h> #include <soc/pci_devs.h> @@ -330,7 +330,7 @@ #endif
/* Configure Source decode for Extended BIOS Region */ - if (dmi_enable_gpmr(CONFIG_EXT_BIOS_WIN_BASE, CONFIG_EXT_BIOS_WIN_SIZE, + if (enable_gpmr(CONFIG_EXT_BIOS_WIN_BASE, CONFIG_EXT_BIOS_WIN_SIZE, soc_get_spi_psf_destination_id()) == CB_ERR) return;
diff --git a/src/soc/intel/common/block/gpmr/Makefile.inc b/src/soc/intel/common/block/gpmr/Makefile.inc new file mode 100644 index 0000000..20cf7b0 --- /dev/null +++ b/src/soc/intel/common/block/gpmr/Makefile.inc @@ -0,0 +1,4 @@ +bootblock-y += gpmr.c +romstage-y += gpmr.c +ramstage-y += gpmr.c + diff --git a/src/soc/intel/common/block/gpmr/gpmr.c b/src/soc/intel/common/block/gpmr/gpmr.c new file mode 100644 index 0000000..6a8126a --- /dev/null +++ b/src/soc/intel/common/block/gpmr/gpmr.c @@ -0,0 +1,66 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <console/console.h> +#include <intelblocks/dmi.h> +#include <intelblocks/pcr.h> +#include <soc/pcr_ids.h> + +#define MAX_GPMR_REGS 3 + +#define GPMR_LIMIT_MASK 0xffff0000 +#define GPMR_BASE_SHIFT 16 +#define GPMR_BASE_MASK 0xffff +#define GPMR_EN BIT(31) + +/* Check for available free gpmr */ +static int get_available_gpmr(void) +{ + int i; + uint32_t val; + + for (i = 0; i < MAX_GPMR_REGS; i++) { + val = pcr_read32(PID_DMI, PCR_GPMR_OFFSET(i)); + if (!(val & GPMR_EN)) + return i; + } + printk(BIOS_ERR, "%s: No available free gpmr found\n", __func__); + return CB_ERR; +} + +/* Configure GPMR for the given base and size of extended BIOS Region */ +enum cb_err enable_gpmr(uint32_t base, uint32_t size, uint32_t dest_id) +{ + int gpmr_num; + uint32_t limit; + + if (base & ~(GPMR_BASE_MASK << GPMR_BASE_SHIFT)) { + printk(BIOS_ERR, "base is not 64-KiB aligned!\n"); + return CB_ERR; + } + + limit = base + (size - 1); + + if (limit < base) { + printk(BIOS_ERR, "Invalid limit: limit cannot be less than base!\n"); + return CB_ERR; + } + + if ((limit & ~GPMR_LIMIT_MASK) != 0xffff) { + printk(BIOS_ERR, "limit does not end on a 64-KiB boundary!\n"); + return CB_ERR; + } + + /* Get available free GPMR */ + gpmr_num = get_available_gpmr(); + if (gpmr_num == CB_ERR) + return CB_ERR; + + /* Program Range for the given decode window */ + pcr_write32(PID_DMI, PCR_GPMR_OFFSET(gpmr_num), (limit & GPMR_LIMIT_MASK) | + ((base >> GPMR_BASE_SHIFT) & GPMR_BASE_MASK)); + + /* Program source decode enable bit and the Destination ID */ + pcr_write32(PID_DMI, PCR_GPMR_DID_OFFSET(gpmr_num), dest_id | GPMR_EN); + + return CB_SUCCESS; +} diff --git a/src/soc/intel/common/block/include/intelblocks/dmi.h b/src/soc/intel/common/block/include/intelblocks/dmi.h index 8b12602..3f56b93 100644 --- a/src/soc/intel/common/block/include/intelblocks/dmi.h +++ b/src/soc/intel/common/block/include/intelblocks/dmi.h @@ -11,10 +11,7 @@ #define PCR_DMI_GCS 0x274C #define PCR_DMI_GCS_BILD (1 << 0)
-/* - * Takes base, size and destination ID and configures the GPMR - * for accessing the region. - */ -enum cb_err dmi_enable_gpmr(uint32_t base, uint32_t size, uint32_t dest_id); +#define PCR_GPMR_OFFSET(x) (0x277c + (x) * 8) +#define PCR_GPMR_DID_OFFSET(x) (0x2780 + (x) * 8)
#endif /* SOC_INTEL_COMMON_BLOCK_DMI_H */ diff --git a/src/soc/intel/common/block/include/intelblocks/gpmr.h b/src/soc/intel/common/block/include/intelblocks/gpmr.h new file mode 100644 index 0000000..a1d0fc3 --- /dev/null +++ b/src/soc/intel/common/block/include/intelblocks/gpmr.h @@ -0,0 +1,10 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef SOC_INTEL_COMMON_BLOCK_GPMR_H +#define SOC_INTEL_COMMON_BLOCK_GPMR_H + +#include <types.h> + +enum cb_err enable_gpmr(uint32_t base, uint32_t size, uint32_t dest_id); + +#endif /* SOC_INTEL_COMMON_BLOCK_GPMR_H */
-
Wonkyu Kim (Code Review)