Sumeet R Pawnikar has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/31984
Change subject: mb/mainboard/google/hatch/variants: Set tcc_offset value ......................................................................
mb/mainboard/google/hatch/variants: Set tcc_offset value
Set tcc_offset value to 5C. It configures the Thermal Control Circuit (TCC) activaction value to 95C. This prevents any abrupt thermal shutdown by taking early thermal throttling action when CPU temperature goes above 95C.
Change-Id: Ifee0fcc326530622b04e60af0f3b9cb9e3aea7ea Signed-off-by: Sumeet Pawnikar sumeet.r.pawnikar@intel.com --- M src/mainboard/google/hatch/variants/baseboard/devicetree.cb 1 file changed, 1 insertion(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/84/31984/1
diff --git a/src/mainboard/google/hatch/variants/baseboard/devicetree.cb b/src/mainboard/google/hatch/variants/baseboard/devicetree.cb index 16a0ef1..516ee79 100644 --- a/src/mainboard/google/hatch/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/hatch/variants/baseboard/devicetree.cb @@ -66,6 +66,7 @@ register "tdp_pl1_override" = "15" register "tdp_pl2_override" = "44" register "Device4Enable" = "1" + register "tcc_offset" = "5" # TCC of 95C
register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC2)" # Type-C Port 0 register "usb2_ports[1]" = "USB2_PORT_TYPE_C(OC2)" # Type-C Port 1
Hello Aaron Durbin, Todd Broch, Duncan Laurie, build bot (Jenkins), Furquan Shaikh, Patrick Georgi,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/31984
to look at the new patch set (#2).
Change subject: mb/mainboard/google/hatch/variants: Set tcc_offset value ......................................................................
mb/mainboard/google/hatch/variants: Set tcc_offset value
Set tcc_offset value to 10C. It configures the Thermal Control Circuit (TCC) activaction value to 90C. This prevents any abrupt thermal shutdown by taking early thermal throttling action when CPU temperature goes above 90C.
Change-Id: Ifee0fcc326530622b04e60af0f3b9cb9e3aea7ea Signed-off-by: Sumeet Pawnikar sumeet.r.pawnikar@intel.com --- M src/mainboard/google/hatch/variants/baseboard/devicetree.cb 1 file changed, 1 insertion(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/84/31984/2
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31984 )
Change subject: mb/mainboard/google/hatch/variants: Set tcc_offset value ......................................................................
Patch Set 2: Code-Review+2
Patrick Georgi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31984 )
Change subject: mb/mainboard/google/hatch/variants: Set tcc_offset value ......................................................................
Patch Set 2:
needs a rebase which will also solve the unrelated tegra issue
Sumeet R Pawnikar has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31984 )
Change subject: mb/mainboard/google/hatch/variants: Set tcc_offset value ......................................................................
Patch Set 2:
Patch Set 2:
needs a rebase which will also solve the unrelated tegra issue
Working on rebase. We will submit it soon. Thanks.
Hello Aaron Durbin, Todd Broch, Duncan Laurie, build bot (Jenkins), Patrick Georgi, Furquan Shaikh,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/31984
to look at the new patch set (#3).
Change subject: mb/mainboard/google/hatch/variants: Set tcc_offset value ......................................................................
mb/mainboard/google/hatch/variants: Set tcc_offset value
Set tcc_offset value to 10C. It configures the Thermal Control Circuit (TCC) activaction value to 90C. This prevents any abrupt thermal shutdown by taking early thermal throttling action when CPU temperature goes above 90C.
Change-Id: Ifee0fcc326530622b04e60af0f3b9cb9e3aea7ea Signed-off-by: Sumeet Pawnikar sumeet.r.pawnikar@intel.com --- M src/mainboard/google/hatch/variants/baseboard/devicetree.cb 1 file changed, 1 insertion(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/84/31984/3
Patrick Georgi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31984 )
Change subject: mb/mainboard/google/hatch/variants: Set tcc_offset value ......................................................................
Patch Set 3: Code-Review+1
(2 comments)
https://review.coreboot.org/#/c/31984/3//COMMIT_MSG Commit Message:
https://review.coreboot.org/#/c/31984/3//COMMIT_MSG@10 PS3, Line 10: activaction activation
https://review.coreboot.org/#/c/31984/3/src/mainboard/google/hatch/variants/... File src/mainboard/google/hatch/variants/baseboard/devicetree.cb:
https://review.coreboot.org/#/c/31984/3/src/mainboard/google/hatch/variants/... PS3, Line 75: "10" # TCC of 90C potential idea for a follow-up commit: make a field "tcc" that takes degrees and convert it in the code?
Hello Aaron Durbin, Todd Broch, Duncan Laurie, build bot (Jenkins), Patrick Georgi, Furquan Shaikh,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/31984
to look at the new patch set (#4).
Change subject: mb/mainboard/google/hatch/variants: Set tcc_offset value ......................................................................
mb/mainboard/google/hatch/variants: Set tcc_offset value
Set tcc_offset value to 10C. It configures the Thermal Control Circuit (TCC) activation value to 90C. This prevents any abrupt thermal shutdown by taking early thermal throttling action when CPU temperature goes above 90C.
Change-Id: Ifee0fcc326530622b04e60af0f3b9cb9e3aea7ea Signed-off-by: Sumeet Pawnikar sumeet.r.pawnikar@intel.com --- M src/mainboard/google/hatch/variants/baseboard/devicetree.cb 1 file changed, 1 insertion(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/84/31984/4
Patrick Georgi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31984 )
Change subject: mb/mainboard/google/hatch/variants: Set tcc_offset value ......................................................................
Patch Set 4: Code-Review+2
Patrick Georgi has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/31984 )
Change subject: mb/mainboard/google/hatch/variants: Set tcc_offset value ......................................................................
mb/mainboard/google/hatch/variants: Set tcc_offset value
Set tcc_offset value to 10C. It configures the Thermal Control Circuit (TCC) activation value to 90C. This prevents any abrupt thermal shutdown by taking early thermal throttling action when CPU temperature goes above 90C.
Change-Id: Ifee0fcc326530622b04e60af0f3b9cb9e3aea7ea Signed-off-by: Sumeet Pawnikar sumeet.r.pawnikar@intel.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/31984 Reviewed-by: Patrick Georgi pgeorgi@google.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/mainboard/google/hatch/variants/baseboard/devicetree.cb 1 file changed, 1 insertion(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Patrick Georgi: Looks good to me, approved
diff --git a/src/mainboard/google/hatch/variants/baseboard/devicetree.cb b/src/mainboard/google/hatch/variants/baseboard/devicetree.cb index bda6e2a..dc7cc24 100644 --- a/src/mainboard/google/hatch/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/hatch/variants/baseboard/devicetree.cb @@ -72,6 +72,7 @@ # Enable HPD for DDI ports B/C register "DdiPortBHpd" = "1" register "DdiPortCHpd" = "1" + register "tcc_offset" = "10" # TCC of 90C
register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC2)" # Type-C Port 0 register "usb2_ports[1]" = "USB2_PORT_TYPE_C(OC2)" # Type-C Port 1
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Furquan Shaikh (Code Review) -
Patrick Georgi (Code Review)
-
Sumeet R Pawnikar (Code Review)