Attention is currently required from: Andrey Petrov, Ronak Kanabar.
Jérémy Compostella has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/80276?usp=email )
Change subject: drivers/intel/fsp2_0: Support FSP 2.4 64-bits ......................................................................
drivers/intel/fsp2_0: Support FSP 2.4 64-bits
FSP 2.4 brings FSP 64-bits support which requires some adjustments in coreboot:
- Stack alignment:
1. FSP functions must be called with the stack 16-bytes aligned. This is already setup properly with the default value of the `mpreferred-stack-boundary' compiler option (4).
2. The FSP stack buffer supplied by coreboot through the `StackBase' UPD must be 16-bytes aligned.
- The EDK2 EFIAPI macro definition relies on compiler flags such as __GNUC__ which is not working well when included by coreboot. While it has no side-effect on i386 because the C calling convention used by coreboot and FSP are the same, it breaks on x86_64 because FSP/UEFI uses the Microsoft x64 calling convention while coreboot uses the System V AMD64 ABI.
Fortunately, EDK2 header allows to override the EFIAPI definition. The __ms_abi__ attribute works for both i386 and x86_64.
This attribute has to be set to all functions calling or called by the FSP.
- The EFI_STATUS/efi_return_status_t size changes with the architecture (32-bits vs 64-bits). To print statuses independently of the architecture we leverage the size_t 'z' print format which is generally aligned with the architecture size too.
In addition, this commit sets`PLATFORM_USES_FSP2_X86_32' to `n' by default if FSP 2.4 is enabled as 64-bits FSP should be norm moving forward.
Change-Id: I3fa012fa6f98e4bb3c2a033189554ad5a6ddfced Signed-off-by: Jeremy Compostella jeremy.compostella@intel.com --- M src/drivers/intel/fsp2_0/Kconfig M src/drivers/intel/fsp2_0/debug.c M src/drivers/intel/fsp2_0/fsp_debug_event.c M src/drivers/intel/fsp2_0/include/fsp/api.h M src/drivers/intel/fsp2_0/include/fsp/debug.h M src/drivers/intel/fsp2_0/include/fsp/fsp_debug_event.h M src/drivers/intel/fsp2_0/include/fsp/info_header.h M src/drivers/intel/fsp2_0/include/fsp/soc_binding.h M src/drivers/intel/fsp2_0/include/fsp/util.h M src/drivers/intel/fsp2_0/memory_init.c M src/drivers/intel/fsp2_0/ppi/mp_service1.c M src/drivers/intel/fsp2_0/ppi/mp_service2.c M src/drivers/intel/fsp2_0/silicon_init.c M src/drivers/intel/fsp2_0/util.c M src/include/efi/efi_datatype.h M src/soc/intel/common/fsp_reset.c 16 files changed, 90 insertions(+), 57 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/76/80276/1
diff --git a/src/drivers/intel/fsp2_0/Kconfig b/src/drivers/intel/fsp2_0/Kconfig index 2c8bdc4..61d68f6 100644 --- a/src/drivers/intel/fsp2_0/Kconfig +++ b/src/drivers/intel/fsp2_0/Kconfig @@ -55,10 +55,11 @@
config PLATFORM_USES_FSP2_X86_32 bool + default n if PLATFORM_USES_FSP2_4 default y help - The FSP 2.0 runs in x86_32 protected mode. - Once there's a x86_64 FSP this needs to default to n. + Specify if the FSP binaries are 32-bits (yes) or 64-bits + (no). Starting with FSP specification 2.4 they can be 64-bits.
config HAVE_INTEL_FSP_REPO bool diff --git a/src/drivers/intel/fsp2_0/debug.c b/src/drivers/intel/fsp2_0/debug.c index 8c0d67d..1152413 100644 --- a/src/drivers/intel/fsp2_0/debug.c +++ b/src/drivers/intel/fsp2_0/debug.c @@ -91,10 +91,10 @@ printk(BIOS_SPEW, "\t%p: &hob_list_ptr\n", fsp_get_hob_list_ptr()); }
-void fsp_debug_after_memory_init(uint32_t status) +void fsp_debug_after_memory_init(efi_return_status_t status) { if (CONFIG(DISPLAY_FSP_CALLS_AND_STATUS)) - printk(BIOS_SPEW, "FspMemoryInit returned 0x%08x\n", status); + printk(BIOS_SPEW, "FspMemoryInit returned 0x%zx\n", (size_t)status);
if (status != FSP_SUCCESS) return; @@ -136,13 +136,14 @@ printk(BIOS_SPEW, "\t%p: upd\n", fsps_new_upd); }
-void fsp_debug_after_silicon_init(uint32_t status) +void fsp_debug_after_silicon_init(efi_return_status_t status) { if (CONFIG(CHECK_GPIO_CONFIG_CHANGES)) fsp_gpio_config_check(AFTER_FSP_CALL, "FSP Silicon Init");
if (CONFIG(DISPLAY_FSP_CALLS_AND_STATUS)) - printk(BIOS_SPEW, "FspSiliconInit returned 0x%08x\n", status); + printk(BIOS_SPEW, "FspSiliconInit returned 0x%zx\n", + (size_t)status);
/* Display the HOBs */ if (CONFIG(DISPLAY_HOBS)) @@ -170,13 +171,14 @@ printk(BIOS_SPEW, "\t%p: notify_params\n", notify_params); }
-void fsp_debug_after_notify(uint32_t status) +void fsp_debug_after_notify(efi_return_status_t status) { if (CONFIG(CHECK_GPIO_CONFIG_CHANGES)) fsp_gpio_config_check(AFTER_FSP_CALL, "FSP Notify");
if (CONFIG(DISPLAY_FSP_CALLS_AND_STATUS)) - printk(BIOS_SPEW, "FspNotify returned 0x%08x\n", status); + printk(BIOS_SPEW, "FspNotify returned 0x%zx\n", + (size_t)status);
/* Display the HOBs */ if (CONFIG(DISPLAY_HOBS)) diff --git a/src/drivers/intel/fsp2_0/fsp_debug_event.c b/src/drivers/intel/fsp2_0/fsp_debug_event.c index 2ebecc0..4b3e151a 100644 --- a/src/drivers/intel/fsp2_0/fsp_debug_event.c +++ b/src/drivers/intel/fsp2_0/fsp_debug_event.c @@ -17,7 +17,7 @@ return FSP_SUCCESS; }
-efi_return_status_t fsp_debug_event_handler(efi_status_code_type_t ignored1, +__efiapi efi_return_status_t fsp_debug_event_handler(efi_status_code_type_t ignored1, efi_status_code_value_t ignored2, efi_uint32_t ignored3, efi_guid_t *ignored4, efi_status_code_data_t *data) { diff --git a/src/drivers/intel/fsp2_0/include/fsp/api.h b/src/drivers/intel/fsp2_0/include/fsp/api.h index 971be0d..7d7494c 100644 --- a/src/drivers/intel/fsp2_0/include/fsp/api.h +++ b/src/drivers/intel/fsp2_0/include/fsp/api.h @@ -8,6 +8,8 @@ #include <fsp/soc_binding.h> #include <soc/intel/common/mma.h>
+#define __efiapi EFIAPI + #define FSP_SUCCESS EFI_SUCCESS #define FSP_INVALID_PARAMETER EFI_INVALID_PARAMETER #define FSP_DEVICE_ERROR EFI_DEVICE_ERROR diff --git a/src/drivers/intel/fsp2_0/include/fsp/debug.h b/src/drivers/intel/fsp2_0/include/fsp/debug.h index 044ce95..0e89fac 100644 --- a/src/drivers/intel/fsp2_0/include/fsp/debug.h +++ b/src/drivers/intel/fsp2_0/include/fsp/debug.h @@ -19,14 +19,14 @@ void fsp_debug_before_memory_init(fsp_memory_init_fn memory_init, const FSPM_UPD *fspm_old_upd, const FSPM_UPD *fspm_new_upd); -void fsp_debug_after_memory_init(uint32_t status); +void fsp_debug_after_memory_init(efi_return_status_t status); void fsp_debug_before_silicon_init(fsp_silicon_init_fn silicon_init, const FSPS_UPD *fsps_old_upd, const FSPS_UPD *fsps_new_upd); -void fsp_debug_after_silicon_init(uint32_t status); +void fsp_debug_after_silicon_init(efi_return_status_t status); void fsp_before_debug_notify(fsp_notify_fn notify, const struct fsp_notify_params *notify_params); -void fsp_debug_after_notify(uint32_t status); +void fsp_debug_after_notify(efi_return_status_t status); void fspm_display_upd_values(const FSPM_UPD *old, const FSPM_UPD *new); void fsp_display_hobs(void); diff --git a/src/drivers/intel/fsp2_0/include/fsp/fsp_debug_event.h b/src/drivers/intel/fsp2_0/include/fsp/fsp_debug_event.h index 7d50c1e..b6f7a51 100644 --- a/src/drivers/intel/fsp2_0/include/fsp/fsp_debug_event.h +++ b/src/drivers/intel/fsp2_0/include/fsp/fsp_debug_event.h @@ -8,11 +8,12 @@ * More details about this structure can be found here : * http://github.com/tianocore/edk2/blob/master/IntelFsp2Pkg/Include/FspEas/Fsp... */ -#include <efi/efi_datatype.h> #include <fsp/soc_binding.h> +#include <fsp/api.h> +#include <efi/efi_datatype.h>
/* fsp debug event handler */ -efi_return_status_t fsp_debug_event_handler(efi_status_code_type_t ignored1, +__efiapi efi_return_status_t fsp_debug_event_handler(efi_status_code_type_t ignored1, efi_status_code_value_t ignored2, efi_uint32_t ignored3, efi_guid_t *ignored4, efi_status_code_data_t *data);
diff --git a/src/drivers/intel/fsp2_0/include/fsp/info_header.h b/src/drivers/intel/fsp2_0/include/fsp/info_header.h index 563a7e6..e8d853b 100644 --- a/src/drivers/intel/fsp2_0/include/fsp/info_header.h +++ b/src/drivers/intel/fsp2_0/include/fsp/info_header.h @@ -12,7 +12,6 @@ #define FSP_HDR_ATTRIB_FSPS 3 #define FSP_IMAGE_ID_LENGTH 8
-#if CONFIG(PLATFORM_USES_FSP2_X86_32) struct fsp_header { uint32_t signature; //FSPH uint32_t header_length; @@ -42,9 +41,6 @@ uint32_t fsp_smm_init_entry_offset; #endif } __packed; -#else -#error You need to implement this struct for x86_64 FSP -#endif
enum cb_err fsp_identify(struct fsp_header *hdr, const void *fsp_blob); diff --git a/src/drivers/intel/fsp2_0/include/fsp/soc_binding.h b/src/drivers/intel/fsp2_0/include/fsp/soc_binding.h index ba3e289..f6369b5 100644 --- a/src/drivers/intel/fsp2_0/include/fsp/soc_binding.h +++ b/src/drivers/intel/fsp2_0/include/fsp/soc_binding.h @@ -5,6 +5,18 @@
#include <stddef.h>
+/* + * EDK2 EFIAPI macro definition relies on compiler flags such as __GNUC__ which + * is not working well when included by coreboot. While it has no side-effect on + * i386 because the C calling convention used by coreboot and FSP are the same, + * it breaks on x86_64 because FSP/UEFI uses the Microsoft x64 calling + * convention while coreboot uses the System V AMD64 ABI. + * + * Fortunately, EDK2 header allows to override the EFIAPI. The __ms_abi__ + * attribute works for both i386 and x86_64. + */ +#define EFIAPI __attribute__((__ms_abi__)) + #pragma pack(push)
/** diff --git a/src/drivers/intel/fsp2_0/include/fsp/util.h b/src/drivers/intel/fsp2_0/include/fsp/util.h index becf91a..f64fdc3 100644 --- a/src/drivers/intel/fsp2_0/include/fsp/util.h +++ b/src/drivers/intel/fsp2_0/include/fsp/util.h @@ -187,10 +187,10 @@ * SoC. If the requested status is not a reboot status or unhandled, this * function does nothing. */ -void fsp_handle_reset(uint32_t status); +void fsp_handle_reset(efi_return_status_t status);
/* SoC/chipset must provide this to handle platform-specific reset codes */ -void chipset_handle_reset(uint32_t status); +void chipset_handle_reset(efi_return_status_t status);
#if CONFIG(PLATFORM_USES_SECOND_FSP) /* The SoC must implement these to choose the appropriate FSP-M/FSP-S binary. */ @@ -207,12 +207,12 @@ } #endif
-typedef asmlinkage uint32_t (*temp_ram_exit_fn)(void *param); -typedef asmlinkage uint32_t (*fsp_memory_init_fn) +typedef __efiapi efi_return_status_t (*temp_ram_exit_fn)(void *param); +typedef __efiapi efi_return_status_t (*fsp_memory_init_fn) (void *raminit_upd, void **hob_list); -typedef asmlinkage uint32_t (*fsp_silicon_init_fn)(void *silicon_upd); -typedef asmlinkage uint32_t (*fsp_multi_phase_init_fn)(struct fsp_multi_phase_params *); -typedef asmlinkage uint32_t (*fsp_notify_fn)(struct fsp_notify_params *); +typedef __efiapi efi_return_status_t (*fsp_silicon_init_fn)(void *silicon_upd); +typedef __efiapi efi_return_status_t (*fsp_multi_phase_init_fn)(struct fsp_multi_phase_params *); +typedef __efiapi efi_return_status_t (*fsp_notify_fn)(struct fsp_notify_params *); #include <fsp/debug.h>
#endif /* _FSP2_0_UTIL_H_ */ diff --git a/src/drivers/intel/fsp2_0/memory_init.c b/src/drivers/intel/fsp2_0/memory_init.c index b48cc93..fb1a5eb 100644 --- a/src/drivers/intel/fsp2_0/memory_init.c +++ b/src/drivers/intel/fsp2_0/memory_init.c @@ -34,7 +34,11 @@ /* Leave for the SoC/Mainboard to implement if necessary. */ }
+#if CONFIG(PLATFORM_USES_FSP2_X86_32) static uint8_t temp_ram[CONFIG_FSP_TEMP_RAM_SIZE] __aligned(sizeof(uint64_t)); +#else +static uint8_t temp_ram[CONFIG_FSP_TEMP_RAM_SIZE] __aligned(16); +#endif
/* * Helper function to store the MRC cache version into CBMEM @@ -275,7 +279,8 @@ return ver; }
-static void error_handler(const char *context, uint32_t status, bool die_on_error) +static void error_handler(const char *context, efi_return_status_t status, + bool die_on_error) { if (status == FSP_SUCCESS) return; @@ -292,7 +297,7 @@ #if CONFIG(PLATFORM_USES_FSP2_4) static void multi_phase_init(const struct fsp_header *hdr) { - uint32_t status; + efi_return_status_t status; fsp_multi_phase_init_fn fsp_multi_phase_init; struct fsp_multi_phase_params multi_phase_params; struct fsp_multi_phase_get_number_of_phases_params multi_phase_get_number; @@ -333,7 +338,7 @@
static void do_fsp_memory_init(const struct fspm_context *context, bool s3wake) { - uint32_t status; + efi_return_status_t status; fsp_memory_init_fn fsp_raminit; FSPM_UPD fspm_upd, *upd; FSPM_ARCHx_UPD *arch_upd; diff --git a/src/drivers/intel/fsp2_0/ppi/mp_service1.c b/src/drivers/intel/fsp2_0/ppi/mp_service1.c index 879a8e8..3c036c1 100644 --- a/src/drivers/intel/fsp2_0/ppi/mp_service1.c +++ b/src/drivers/intel/fsp2_0/ppi/mp_service1.c @@ -6,14 +6,14 @@
typedef EFI_PEI_MP_SERVICES_PPI efi_pei_mp_services_ppi;
-static efi_return_status_t mps1_get_number_of_processors(const +static __efiapi efi_return_status_t mps1_get_number_of_processors(const efi_pei_services **ignored1, efi_pei_mp_services_ppi *ignored2, efi_uintn_t *number_of_processors, efi_uintn_t *number_of_enabled_processors) { return mp_get_number_of_processors(number_of_processors, number_of_enabled_processors); }
-static efi_return_status_t mps1_get_processor_info(const +static __efiapi efi_return_status_t mps1_get_processor_info(const efi_pei_services **ignored1, efi_pei_mp_services_ppi *ignored2, efi_uintn_t processor_number, efi_processor_information *processor_info_buffer) @@ -21,7 +21,7 @@ return mp_get_processor_info(processor_number, processor_info_buffer); }
-static efi_return_status_t mps1_startup_all_aps(const +static __efiapi efi_return_status_t mps1_startup_all_aps(const efi_pei_services **ignored1, efi_pei_mp_services_ppi *ignored2, efi_ap_procedure procedure, efi_boolean_t run_serial, efi_uintn_t timeout_usec, void *argument) @@ -29,7 +29,7 @@ return mp_startup_all_aps(procedure, run_serial, timeout_usec, argument); }
-static efi_return_status_t mps1_startup_this_ap(const +static __efiapi efi_return_status_t mps1_startup_this_ap(const efi_pei_services **ignored1, efi_pei_mp_services_ppi *ignored2, efi_ap_procedure procedure, efi_uintn_t processor_number, efi_uintn_t timeout_usec, void *argument) @@ -37,21 +37,21 @@ return mp_startup_this_ap(procedure, processor_number, timeout_usec, argument); }
-static efi_return_status_t mps1_switch_bsp(const efi_pei_services **ignored1, +static __efiapi efi_return_status_t mps1_switch_bsp(const efi_pei_services **ignored1, efi_pei_mp_services_ppi *ignored2, efi_uintn_t ignored3, efi_boolean_t ignored4) { return mp_api_unsupported(); }
-static efi_return_status_t mps1_enable_disable_ap(const +static __efiapi efi_return_status_t mps1_enable_disable_ap(const efi_pei_services **ignored1, efi_pei_mp_services_ppi *ignored2, efi_uintn_t ignored3, efi_boolean_t ignored4, efi_uint32_t *ignored5) { return mp_api_unsupported(); }
-static efi_return_status_t mps1_identify_processor(const +static __efiapi efi_return_status_t mps1_identify_processor(const efi_pei_services **ignored1, efi_pei_mp_services_ppi *ignored2, efi_uintn_t *processor_number) { diff --git a/src/drivers/intel/fsp2_0/ppi/mp_service2.c b/src/drivers/intel/fsp2_0/ppi/mp_service2.c index fd91b46..28bcadf 100644 --- a/src/drivers/intel/fsp2_0/ppi/mp_service2.c +++ b/src/drivers/intel/fsp2_0/ppi/mp_service2.c @@ -6,7 +6,7 @@
typedef EDKII_PEI_MP_SERVICES2_PPI efi_pei_mp_services_ppi;
-static efi_return_status_t mps2_get_number_of_processors( +static __efiapi efi_return_status_t mps2_get_number_of_processors( efi_pei_mp_services_ppi *ignored1, efi_uintn_t *number_of_processors, efi_uintn_t *number_of_enabled_processors) @@ -14,7 +14,7 @@ return mp_get_number_of_processors(number_of_processors, number_of_enabled_processors); }
-static efi_return_status_t mps2_get_processor_info( +static __efiapi efi_return_status_t mps2_get_processor_info( efi_pei_mp_services_ppi *ignored1, efi_uintn_t processor_number, efi_processor_information *processor_info_buffer) @@ -22,7 +22,7 @@ return mp_get_processor_info(processor_number, processor_info_buffer); }
-static efi_return_status_t mps2_startup_all_aps( +static __efiapi efi_return_status_t mps2_startup_all_aps( efi_pei_mp_services_ppi *ignored1, efi_ap_procedure procedure, efi_boolean_t run_serial, efi_uintn_t timeout_usec, void *argument) @@ -30,7 +30,7 @@ return mp_startup_all_aps(procedure, run_serial, timeout_usec, argument); }
-static efi_return_status_t mps2_startup_all_cpus( +static __efiapi efi_return_status_t mps2_startup_all_cpus( efi_pei_mp_services_ppi *ignored1, efi_ap_procedure procedure, efi_uintn_t timeout_usec, void *argument) @@ -38,7 +38,7 @@ return mp_startup_all_cpus(procedure, timeout_usec, argument); }
-static efi_return_status_t mps2_startup_this_ap( +static __efiapi efi_return_status_t mps2_startup_this_ap( efi_pei_mp_services_ppi *ignored1, efi_ap_procedure procedure, efi_uintn_t processor_number, efi_uintn_t timeout_usec, void *argument) @@ -46,21 +46,21 @@ return mp_startup_this_ap(procedure, processor_number, timeout_usec, argument); }
-static efi_return_status_t mps2_switch_bsp( +static __efiapi efi_return_status_t mps2_switch_bsp( efi_pei_mp_services_ppi *ignored1, efi_uintn_t ignored2, efi_boolean_t ignored3) { return mp_api_unsupported(); }
-static efi_return_status_t mps2_enable_disable_ap( +static __efiapi efi_return_status_t mps2_enable_disable_ap( efi_pei_mp_services_ppi *ignored1, efi_uintn_t ignored2, efi_boolean_t ignored3, efi_uint32_t *ignored4) { return mp_api_unsupported(); }
-static efi_return_status_t mps2_identify_processor( +static __efiapi efi_return_status_t mps2_identify_processor( efi_pei_mp_services_ppi *ignored1, efi_uintn_t *processor_number) { diff --git a/src/drivers/intel/fsp2_0/silicon_init.c b/src/drivers/intel/fsp2_0/silicon_init.c index c1953b4..8a51d88 100644 --- a/src/drivers/intel/fsp2_0/silicon_init.c +++ b/src/drivers/intel/fsp2_0/silicon_init.c @@ -36,7 +36,8 @@ FSP_MULTI_PHASE_SI_INIT_EXECUTE_PHASE_API };
-static void fsps_return_value_handler(enum fsp_silicon_init_phases phases, uint32_t status) +static void fsps_return_value_handler(enum fsp_silicon_init_phases phases, + efi_return_status_t status) { uint8_t postcode;
@@ -54,16 +55,17 @@
switch (phases) { case FSP_SILICON_INIT_API: - die_with_post_code(postcode, "FspSiliconInit returned with error 0x%08x\n", - status); + die_with_post_code(postcode, + "FspSiliconInit returned with error 0x%zx\n", + (size_t)status); break; case FSP_MULTI_PHASE_SI_INIT_GET_NUMBER_OF_PHASES_API: - printk(BIOS_SPEW, "FspMultiPhaseSiInit NumberOfPhases returned 0x%08x\n", - status); + printk(BIOS_SPEW, "FspMultiPhaseSiInit NumberOfPhases returned 0x%zx\n", + (size_t)status); break; case FSP_MULTI_PHASE_SI_INIT_EXECUTE_PHASE_API: - printk(BIOS_SPEW, "FspMultiPhaseSiInit ExecutePhase returned 0x%08x\n", - status); + printk(BIOS_SPEW, "FspMultiPhaseSiInit ExecutePhase returned 0x%zx\n", + (size_t)status); break; default: break; @@ -88,7 +90,7 @@ { FSPS_UPD *upd, *supd; fsp_silicon_init_fn silicon_init; - uint32_t status; + efi_return_status_t status; fsp_multi_phase_init_fn multi_phase_si_init; struct fsp_multi_phase_params multi_phase_params; struct fsp_multi_phase_get_number_of_phases_params multi_phase_get_number; @@ -139,7 +141,7 @@ status = silicon_init(upd); null_breakpoint_init();
- printk(BIOS_INFO, "FSPS returned %x\n", status); + printk(BIOS_INFO, "FSPS returned %zx\n", (size_t)status);
timestamp_add_now(TS_FSP_SILICON_INIT_END); post_code(POSTCODE_FSP_SILICON_EXIT); diff --git a/src/drivers/intel/fsp2_0/util.c b/src/drivers/intel/fsp2_0/util.c index f912d9a..fab9958 100644 --- a/src/drivers/intel/fsp2_0/util.c +++ b/src/drivers/intel/fsp2_0/util.c @@ -83,18 +83,18 @@ return CB_SUCCESS; }
-static bool fsp_reset_requested(uint32_t status) +static bool fsp_reset_requested(efi_return_status_t status) { return (status >= FSP_STATUS_RESET_REQUIRED_COLD && status <= FSP_STATUS_RESET_REQUIRED_8); }
-void fsp_handle_reset(uint32_t status) +void fsp_handle_reset(efi_return_status_t status) { if (!fsp_reset_requested(status)) return;
- printk(BIOS_SPEW, "FSP: handling reset type %x\n", status); + printk(BIOS_SPEW, "FSP: handling reset type %zx\n", (size_t)status);
switch (status) { case FSP_STATUS_RESET_REQUIRED_COLD: diff --git a/src/include/efi/efi_datatype.h b/src/include/efi/efi_datatype.h index 917d0c8..0c33dcd 100644 --- a/src/include/efi/efi_datatype.h +++ b/src/include/efi/efi_datatype.h @@ -76,4 +76,16 @@ void (EFIAPI *efi_ap_procedure)(void *buffer);
+/* + * EFI_STATUS/efi_return_status_t size changes with the architecture (32-bits vs + * 64-bits). To print statuses independently of the architecture we leverage the + * size_t 'z' print format which is generally aligned with the architecture size + * too. + * + * This assert is intended to detect unexpected mismatch which could lead to + * incorrect logs. + */ +_Static_assert(sizeof(size_t) == sizeof(efi_return_status_t), + "Unexpected EFI_STATUS size"); + #endif diff --git a/src/soc/intel/common/fsp_reset.c b/src/soc/intel/common/fsp_reset.c index 2bb39bd..0765710 100644 --- a/src/soc/intel/common/fsp_reset.c +++ b/src/soc/intel/common/fsp_reset.c @@ -30,14 +30,14 @@ struct pch_reset_data reset_data; };
-void chipset_handle_reset(uint32_t status) +void chipset_handle_reset(efi_return_status_t status) { if (status == CONFIG_FSP_STATUS_GLOBAL_RESET) { printk(BIOS_DEBUG, "GLOBAL RESET!\n"); global_reset(); }
- printk(BIOS_ERR, "unhandled reset type %x\n", status); + printk(BIOS_ERR, "unhandled reset type %zx\n", (size_t)status); die("unknown reset type"); }
-
Jérémy Compostella (Code Review)