Attention is currently required from: Paul Menzel, Tim Wawrzynczak, Angel Pons, Lean Sheng Tan.
Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/64588 )
Change subject: soc/intel/tigerlake: Drop unused `PCH_DEV_SLOT_LPC` macro
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Patch Set 1:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/64588/comment/24e02666_5764301f
PS1, Line 10: Tiger Lake SoC PCI device list.
Won’t it be used in the future?
Since TGL, LPC IP is dropped and eSPI has introduced. Hence, better we drop it to reflect the SoC design. This is used as of date.
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