Change in coreboot[master]: soc/intel/xeon_sp/cpx: Implement platform_fsp_silicon_init_params_cb

[Marc Jones (Code Review)]

Marc Jones has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46309 )

Change subject: soc/intel/xeon_sp/cpx: Implement platform_fsp_silicon_init_params_cb
......................................................................

soc/intel/xeon_sp/cpx: Implement platform_fsp_silicon_init_params_cb

platform_fsp_silicon_init_params_cb is called by the fsp driver and
calls mainboard_silicon_init_params which sets the mainboard
PCH GPIOs.

Change-Id: Icf401e76741a6a7484295e999ddd566fe9510898
Signed-off-by: Marc Jones 
---
M src/soc/intel/xeon_sp/cpx/chip.c
1 file changed, 3 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/09/46309/1

diff --git a/src/soc/intel/xeon_sp/cpx/chip.c b/src/soc/intel/xeon_sp/cpx/chip.c
index f69797a..6d2dfba 100644
--- a/src/soc/intel/xeon_sp/cpx/chip.c
+++ b/src/soc/intel/xeon_sp/cpx/chip.c
@@ -489,9 +489,11 @@
    DEV_FUNC_EXIT(dev);
 }

+/* UPD parameters to be initialized before SiliconInit */
 void platform_fsp_silicon_init_params_cb(FSPS_UPD *silupd)
 {
-	/* not implemented yet */
+
+	mainboard_silicon_init_params(silupd);
 }

#if CONFIG(HAVE_ACPI_TABLES)

[Marc Jones (Code Review)]

Marc Jones has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46309 )

Change subject: soc/intel/xeon_sp/cpx: Implement platform_fsp_silicon_init_params_cb
......................................................................

Patch Set 2:

Jonathan, This needs to be tested and checked on DeltaLake. It will enable the mainboard GPIO setup in mainboard_silicon_init_params.

[Bryant Ou (Code Review)]

Bryant Ou has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46309 )

Change subject: soc/intel/xeon_sp/cpx: Implement platform_fsp_silicon_init_params_cb
......................................................................

Patch Set 2: Code-Review+1

Tested on DL, it's work.

[Jonathan Zhang (Code Review)]

Jonathan Zhang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46309 )

Change subject: soc/intel/xeon_sp/cpx: Implement platform_fsp_silicon_init_params_cb
......................................................................

Patch Set 3: Code-Review+2

[Marc Jones (Code Review)]

Marc Jones has submitted this change. ( https://review.coreboot.org/c/coreboot/+/46309 )

Change subject: soc/intel/xeon_sp/cpx: Implement platform_fsp_silicon_init_params_cb
......................................................................

soc/intel/xeon_sp/cpx: Implement platform_fsp_silicon_init_params_cb

platform_fsp_silicon_init_params_cb is called by the fsp driver and
calls mainboard_silicon_init_params which sets the mainboard
PCH GPIOs.

Change-Id: Icf401e76741a6a7484295e999ddd566fe9510898
Signed-off-by: Marc Jones 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46309
Reviewed-by: Jonathan Zhang 
Reviewed-by: Bryant Ou 
Tested-by: build bot (Jenkins) 
---
M src/soc/intel/xeon_sp/cpx/chip.c
1 file changed, 3 insertions(+), 1 deletion(-)

Approvals:
  build bot (Jenkins): Verified
  Jonathan Zhang: Looks good to me, approved
  Bryant Ou: Looks good to me, but someone else must approve

diff --git a/src/soc/intel/xeon_sp/cpx/chip.c b/src/soc/intel/xeon_sp/cpx/chip.c
index 11fe44b..c5a8c1c 100644
--- a/src/soc/intel/xeon_sp/cpx/chip.c
+++ b/src/soc/intel/xeon_sp/cpx/chip.c
@@ -488,9 +488,11 @@
    DEV_FUNC_EXIT(dev);
 }

+/* UPD parameters to be initialized before SiliconInit */
 void platform_fsp_silicon_init_params_cb(FSPS_UPD *silupd)
 {
-	/* not implemented yet */
+
+	mainboard_silicon_init_params(silupd);
 }

#if CONFIG(HAVE_ACPI_TABLES)