Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/86420?usp=email )
Change subject: soc/intel/pantherlake: Enable Thunderbolt authentication ......................................................................
soc/intel/pantherlake: Enable Thunderbolt authentication
This commit enables Thunderbolt authentication for Panther Lake by assigning tcss_valid_tbt_auth to the valid_tbt_auth field in `soc_tcss_ops`.
For the SoC's integrated PD solution, AUX BIAS PAD programming is not required and has been removed.
TEST=Verified all USB-C ports are functional.
With this patch, _SB.PCI0.TDM0._DSD exists in the SSDT, containing:
``` Scope (_SB.PCI0.TDM0) { Name (_DSD, Package (0x04) // _DSD: Device-Specific Data { ToUUID ("c44d002f-69f9-4e7d-a904-a7baabdf43f7"), Package (0x01) { Package (0x02) { "IMR_VALID", One } },
ToUUID ("6c501103-c189-4296-ba72-9bf5a26ebe5d"), Package (0x01) { Package (0x02) { "WAKE_SUPPORTED", One } } } ```
Change-Id: I28eac7cfd6511d8680cdae4f830afa73ad201a17 Signed-off-by: Subrata Banik subratabanik@google.com --- M src/soc/intel/pantherlake/tcss.c 1 file changed, 1 insertion(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/20/86420/1
diff --git a/src/soc/intel/pantherlake/tcss.c b/src/soc/intel/pantherlake/tcss.c index 99cbdd2..c37031c 100644 --- a/src/soc/intel/pantherlake/tcss.c +++ b/src/soc/intel/pantherlake/tcss.c @@ -4,7 +4,6 @@ #include <soc/soc_chip.h>
const struct soc_tcss_ops tcss_ops = { -/* TODO: Implement AUX BIAS PAD Programming if required */ .configure_aux_bias_pads = NULL, - .valid_tbt_auth = NULL, + .valid_tbt_auth = tcss_valid_tbt_auth, };