HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/34934 )
Change subject: {i945,i82801gx}: Remove unneeded include <cpu/x86/cache.h> ......................................................................
{i945,i82801gx}: Remove unneeded include <cpu/x86/cache.h>
Change-Id: I4f38be28d81c0c01c0389210552232e63ea55545 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/northbridge/intel/i945/raminit.c M src/southbridge/intel/i82801gx/smihandler.c 2 files changed, 0 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/34/34934/1
diff --git a/src/northbridge/intel/i945/raminit.c b/src/northbridge/intel/i945/raminit.c index dd98433..7096774 100644 --- a/src/northbridge/intel/i945/raminit.c +++ b/src/northbridge/intel/i945/raminit.c @@ -15,7 +15,6 @@ */
#include <console/console.h> -#include <cpu/x86/cache.h> #include <delay.h> #include <device/pci_def.h> #include <device/pci_ops.h> diff --git a/src/southbridge/intel/i82801gx/smihandler.c b/src/southbridge/intel/i82801gx/smihandler.c index 31306fb..16ceb13 100644 --- a/src/southbridge/intel/i82801gx/smihandler.c +++ b/src/southbridge/intel/i82801gx/smihandler.c @@ -16,7 +16,6 @@
#include <types.h> #include <console/console.h> -#include <cpu/x86/cache.h> #include <cpu/x86/smm.h> #include <device/pci_def.h> #include <pc80/mc146818rtc.h>
Patrick Georgi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34934 )
Change subject: {i945,i82801gx}: Remove unneeded include <cpu/x86/cache.h> ......................................................................
Patch Set 4: Code-Review+2
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/34934 )
Change subject: {i945,i82801gx}: Remove unneeded include <cpu/x86/cache.h> ......................................................................
{i945,i82801gx}: Remove unneeded include <cpu/x86/cache.h>
Change-Id: I4f38be28d81c0c01c0389210552232e63ea55545 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr Reviewed-on: https://review.coreboot.org/c/coreboot/+/34934 Reviewed-by: Patrick Georgi pgeorgi@google.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/northbridge/intel/i945/raminit.c M src/southbridge/intel/i82801gx/smihandler.c 2 files changed, 0 insertions(+), 2 deletions(-)
Approvals: build bot (Jenkins): Verified Patrick Georgi: Looks good to me, approved
diff --git a/src/northbridge/intel/i945/raminit.c b/src/northbridge/intel/i945/raminit.c index dd98433..7096774 100644 --- a/src/northbridge/intel/i945/raminit.c +++ b/src/northbridge/intel/i945/raminit.c @@ -15,7 +15,6 @@ */
#include <console/console.h> -#include <cpu/x86/cache.h> #include <delay.h> #include <device/pci_def.h> #include <device/pci_ops.h> diff --git a/src/southbridge/intel/i82801gx/smihandler.c b/src/southbridge/intel/i82801gx/smihandler.c index 31306fb..16ceb13 100644 --- a/src/southbridge/intel/i82801gx/smihandler.c +++ b/src/southbridge/intel/i82801gx/smihandler.c @@ -16,7 +16,6 @@
#include <types.h> #include <console/console.h> -#include <cpu/x86/cache.h> #include <cpu/x86/smm.h> #include <device/pci_def.h> #include <pc80/mc146818rtc.h>
-
HAOUAS Elyes (Code Review) -
Patrick Georgi (Code Review)