Change in coreboot[master]: soc/intel/tigerlake: Do initial SoC commit till ramstage

[Subrata Banik (Code Review)]

Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36087 )

Change subject: soc/intel/tigerlake: Do initial SoC commit till ramstage
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Patch Set 12:

I have divided this CL into possible logic groups as https://review.coreboot.org/q/topic:%22TGL_UPSTREAM%22+(status:open%20OR%20s...)

Kindly help to review.

Also this CL is based on all clean up been done so far with

https://review.coreboot.org/q/topic:%22ICL_CLEAN_UP_FOR_TGL_UPSTREAM%22+(sta...)

Thanks to all reviewer so far helping to clean ICL code in order to create soc/intel/tigerlake copy CL as mentioned above.