Change in coreboot[master]: [WIP] intel/x4x: Clean up some __BOOTBLOCK__ and __ROMCC__ - coreboot-gerrit

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Kyösti Mälkki (Code Review)

25 Sep 2019 25 Sep '19

6:32 a.m.

Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/35603 )

Change subject: [WIP] intel/x4x: Clean up some __BOOTBLOCK__ and __ROMCC__ ......................................................................

[WIP] intel/x4x: Clean up some __BOOTBLOCK__ and __ROMCC__

Change-Id: Ie3f3c043daa6ec18ed14929668e5acae172177b3 Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com --- M src/northbridge/intel/x4x/x4x.h 1 file changed, 1 insertion(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/03/35603/1

diff --git a/src/northbridge/intel/x4x/x4x.h b/src/northbridge/intel/x4x/x4x.h index 5772336..0c69faa 100644 --- a/src/northbridge/intel/x4x/x4x.h +++ b/src/northbridge/intel/x4x/x4x.h @@ -368,7 +368,7 @@ CTRL3, };

-#ifndef __BOOTBLOCK__ +#ifndef __ROMCC__ void x4x_early_init(void); void x4x_late_init(int s3resume); u32 decode_igd_memory_size(u32 gms);

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Kyösti Mälkki (Code Review)

27 Sep 27 Sep

4:51 a.m.

New subject: Change in coreboot[master]: nb,sb/intel: Clean up some __BOOTBLOCK__ and __SIMPLE_DEVICE__ use

Hello Patrick Rudolph, build bot (Jenkins), Damien Zammit,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/35603

to look at the new patch set (#2).

Change subject: nb,sb/intel: Clean up some __BOOTBLOCK__ and __SIMPLE_DEVICE__ use ......................................................................

nb,sb/intel: Clean up some __BOOTBLOCK__ and __SIMPLE_DEVICE__ use

Change-Id: Ie3f3c043daa6ec18ed14929668e5acae172177b3 Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com --- M src/northbridge/intel/fsp_rangeley/northbridge.h M src/northbridge/intel/gm45/gm45.h M src/northbridge/intel/haswell/haswell.h M src/northbridge/intel/sandybridge/sandybridge.h M src/northbridge/intel/x4x/x4x.h M src/southbridge/intel/i82801dx/i82801dx.h 6 files changed, 7 insertions(+), 20 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/03/35603/2

-- To view, visit https://review.coreboot.org/c/coreboot/+/35603 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie3f3c043daa6ec18ed14929668e5acae172177b3 Gerrit-Change-Number: 35603 Gerrit-PatchSet: 2 Gerrit-Owner: Kyösti Mälkki kyosti.malkki@gmail.com Gerrit-Reviewer: Damien Zammit Gerrit-Reviewer: Kyösti Mälkki kyosti.malkki@gmail.com Gerrit-Reviewer: Patrick Rudolph siro@das-labor.org Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-CC: Paul Menzel paulepanter@users.sourceforge.net Gerrit-MessageType: newpatchset

Aaron Durbin (Code Review)

7:42 a.m.

New subject: Change in coreboot[master]: nb,sb/intel: Clean up some __BOOTBLOCK__ and __SIMPLE_DEVICE__ use

Aaron Durbin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35603 )

Change subject: nb,sb/intel: Clean up some __BOOTBLOCK__ and __SIMPLE_DEVICE__ use ......................................................................

Patch Set 2: Code-Review+2

-- To view, visit https://review.coreboot.org/c/coreboot/+/35603 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie3f3c043daa6ec18ed14929668e5acae172177b3 Gerrit-Change-Number: 35603 Gerrit-PatchSet: 2 Gerrit-Owner: Kyösti Mälkki kyosti.malkki@gmail.com Gerrit-Reviewer: Aaron Durbin adurbin@chromium.org Gerrit-Reviewer: Damien Zammit Gerrit-Reviewer: David Guckian david.guckian@intel.com Gerrit-Reviewer: Kyösti Mälkki kyosti.malkki@gmail.com Gerrit-Reviewer: Patrick Rudolph siro@das-labor.org Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-CC: Paul Menzel paulepanter@users.sourceforge.net Gerrit-Comment-Date: Fri, 27 Sep 2019 14:42:31 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

Kyösti Mälkki (Code Review)

28 Sep 28 Sep

2:15 p.m.

New subject: Change in coreboot[master]: nb,sb/intel: Clean up some __BOOTBLOCK__ and __SIMPLE_DEVICE__ use

Kyösti Mälkki has submitted this change. ( https://review.coreboot.org/c/coreboot/+/35603 )

Change subject: nb,sb/intel: Clean up some __BOOTBLOCK__ and __SIMPLE_DEVICE__ use ......................................................................

nb,sb/intel: Clean up some __BOOTBLOCK__ and __SIMPLE_DEVICE__ use

Change-Id: Ie3f3c043daa6ec18ed14929668e5acae172177b3 Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/35603 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Aaron Durbin adurbin@chromium.org --- M src/northbridge/intel/fsp_rangeley/northbridge.h M src/northbridge/intel/gm45/gm45.h M src/northbridge/intel/haswell/haswell.h M src/northbridge/intel/sandybridge/sandybridge.h M src/northbridge/intel/x4x/x4x.h M src/southbridge/intel/i82801dx/i82801dx.h 6 files changed, 7 insertions(+), 20 deletions(-)

Approvals: build bot (Jenkins): Verified Aaron Durbin: Looks good to me, approved

diff --git a/src/northbridge/intel/fsp_rangeley/northbridge.h b/src/northbridge/intel/fsp_rangeley/northbridge.h index 160d754..8375fbf 100644 --- a/src/northbridge/intel/fsp_rangeley/northbridge.h +++ b/src/northbridge/intel/fsp_rangeley/northbridge.h @@ -63,9 +63,7 @@ u32 sideband_read(int port, int reg); void sideband_write(int port, int reg, long data);

-#ifndef __SIMPLE_DEVICE__ void northbridge_acpi_fill_ssdt_generator(struct device *device); -#endif

#endif /* #ifndef __ASSEMBLER__ */ #endif /* #ifndef __ACPI__ */ diff --git a/src/northbridge/intel/gm45/gm45.h b/src/northbridge/intel/gm45/gm45.h index 5d43758..430afe4 100644 --- a/src/northbridge/intel/gm45/gm45.h +++ b/src/northbridge/intel/gm45/gm45.h @@ -449,12 +449,10 @@ u16 get_blc_pwm_freq_value(const char *edid_ascii_string);

-#if ENV_RAMSTAGE && !defined(__SIMPLE_DEVICE__) #include <device/device.h>

struct acpi_rsdp; unsigned long northbridge_write_acpi_tables(struct device *device, unsigned long start, struct acpi_rsdp *rsdp); -#endif

#endif /* !__ACPI__ */ #endif /* __NORTHBRIDGE_INTEL_GM45_GM45_H__ */ diff --git a/src/northbridge/intel/haswell/haswell.h b/src/northbridge/intel/haswell/haswell.h index 55c0b4b..9de0cfb 100644 --- a/src/northbridge/intel/haswell/haswell.h +++ b/src/northbridge/intel/haswell/haswell.h @@ -208,24 +208,20 @@ #ifndef __ASSEMBLER__ static inline void barrier(void) { asm("" ::: "memory"); }

-#ifdef __SMM__ void intel_northbridge_haswell_finalize_smm(void); -#else /* !__SMM__ */ + void haswell_early_initialization(int chipset_type); void haswell_late_initialization(void); void set_translation_table(int start, int end, u64 base, int inc); void haswell_unhide_peg(void);

void report_platform_info(void); -#endif /* !__SMM__ */

-#if ENV_RAMSTAGE && !defined(__SIMPLE_DEVICE__) #include <device/device.h>

struct acpi_rsdp; unsigned long northbridge_write_acpi_tables(struct device *device, unsigned long start, struct acpi_rsdp *rsdp); -#endif

#endif #endif diff --git a/src/northbridge/intel/sandybridge/sandybridge.h b/src/northbridge/intel/sandybridge/sandybridge.h index b488f2c..b598c9b 100644 --- a/src/northbridge/intel/sandybridge/sandybridge.h +++ b/src/northbridge/intel/sandybridge/sandybridge.h @@ -227,12 +227,10 @@ void perform_raminit(int s3resume); enum platform_type get_platform_type(void);

-#if ENV_RAMSTAGE && !defined(__SIMPLE_DEVICE__) #include <device/device.h>

struct acpi_rsdp; unsigned long northbridge_write_acpi_tables(struct device *device, unsigned long start, struct acpi_rsdp *rsdp); -#endif

#endif #endif diff --git a/src/northbridge/intel/x4x/x4x.h b/src/northbridge/intel/x4x/x4x.h index 5772336..05479a1 100644 --- a/src/northbridge/intel/x4x/x4x.h +++ b/src/northbridge/intel/x4x/x4x.h @@ -368,7 +368,6 @@ CTRL3, };

-#ifndef __BOOTBLOCK__ void x4x_early_init(void); void x4x_late_init(int s3resume); u32 decode_igd_memory_size(u32 gms); @@ -411,10 +410,9 @@ extern const u8 ddr3_c2_x264[3][6]; extern const u16 ddr3_c2_x23c[3][6];

+#include <device/device.h> struct acpi_rsdp; -#ifndef __SIMPLE_DEVICE__ unsigned long northbridge_write_acpi_tables(struct device *device, unsigned long start, struct acpi_rsdp *rsdp); -#endif /* __SIMPLE_DEVICE__ */ -#endif + #endif /* __NORTHBRIDGE_INTEL_X4X_H__ */ diff --git a/src/southbridge/intel/i82801dx/i82801dx.h b/src/southbridge/intel/i82801dx/i82801dx.h index ac53ae1..9aa3017 100644 --- a/src/southbridge/intel/i82801dx/i82801dx.h +++ b/src/southbridge/intel/i82801dx/i82801dx.h @@ -30,14 +30,13 @@ #include <arch/acpi.h>

#if !defined(__ASSEMBLER__) -#if !defined(__SIMPLE_DEVICE__) + +#include <device/device.h> #include "chip.h" -extern void i82801dx_enable(struct device *dev); -#else + +void i82801dx_enable(struct device *dev); void enable_smbus(void); int smbus_read_byte(unsigned device, unsigned address); -#endif - void aseg_smm_lock(void);

#endif

-- To view, visit https://review.coreboot.org/c/coreboot/+/35603 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie3f3c043daa6ec18ed14929668e5acae172177b3 Gerrit-Change-Number: 35603 Gerrit-PatchSet: 3 Gerrit-Owner: Kyösti Mälkki kyosti.malkki@gmail.com Gerrit-Reviewer: Aaron Durbin adurbin@chromium.org Gerrit-Reviewer: Damien Zammit Gerrit-Reviewer: David Guckian david.guckian@intel.com Gerrit-Reviewer: Kyösti Mälkki kyosti.malkki@gmail.com Gerrit-Reviewer: Patrick Rudolph siro@das-labor.org Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-CC: Paul Menzel paulepanter@users.sourceforge.net Gerrit-MessageType: merged

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Aaron Durbin (Code Review)
Kyösti Mälkki (Code Review)