Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37870 )
Change subject: soc/intel/tigerlake: Add code for early tcss ......................................................................
Patch Set 17:
(2 comments)
https://review.coreboot.org/c/coreboot/+/37870/17/src/soc/intel/tigerlake/Kc... File src/soc/intel/tigerlake/Kconfig:
https://review.coreboot.org/c/coreboot/+/37870/17/src/soc/intel/tigerlake/Kc... PS17, Line 220: nit: Extra blank line not required.
https://review.coreboot.org/c/coreboot/+/37870/17/src/soc/intel/tigerlake/ea... File src/soc/intel/tigerlake/early_tcss.c:
https://review.coreboot.org/c/coreboot/+/37870/17/src/soc/intel/tigerlake/ea... PS17, Line 174: BS_DEV_ENABLE I think this is still too late. FSP-S gets called as part of chip init. I am thinking we can potentially have a call in soc/intel/tigerlake/chip.c before call to fsp_silicon_init():
if (IS_ENABLED(CONFIG_EARLY_TCSS)) early_tcss_enable();
-
Furquan Shaikh (Code Review)