Change in coreboot[master]: soc/intel/common/block/irq: Add support for intel_write_pci0_PRT

[Tim Wawrzynczak (Code Review)]

Attention is currently required from: Nico Huber, Furquan Shaikh, Patrick Rudolph.
Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/51159 )

Change subject: soc/intel/common/block/irq: Add support for intel_write_pci0_PRT
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Patch Set 10:

(1 comment)

File src/soc/intel/common/block/irq/irq.c:

https://review.coreboot.org/c/coreboot/+/51159/comment/dedc4340_80c59c0b 
PS7, Line 378: 		/* Map INTA->PIRQ_A, INTB->PIRQ_B, INTC->PIRQ_C, INTD->PIRQ_D */
> You are correct, this recommendation comes from the BWG guides IIRC. […]

for posterity: Sorry I misunderstood what you were getting at, we talked on IRC, I realized the error of my ways and trying a new patchset.

we also realized the old IDENTITY constraint appears to be required for PCIe RPs,