Change in coreboot[master]: soc/amd/common/block/cpu: Cache the uCode to avoid multiple SPI reads

[Furquan Shaikh (Code Review)]

Attention is currently required from: Jason Glenesk, Raul Rangel, Martin Roth, Marshall Dawson, Karthik Ramasubramanian, Felix Held.
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55987 )

Change subject: soc/amd/common/block/cpu: Cache the uCode to avoid multiple SPI reads
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Patch Set 1:

(1 comment)

File src/soc/amd/common/block/cpu/update_microcode.c:

https://review.coreboot.org/c/coreboot/+/55987/comment/d97fcd20_43f5afef 
PS1, Line 85: ucode
If this is marked as `static` and we check if `ucode` is not NULL before performing `cbfs_map`, do you still see the same savings?

I am wondering if the `memcpy` to a local buffer is really required? We are accessing memory mapped boot media with caching enabled. So, once this is accessed, I am guessing the line should be hot and will be re-accessed from the cache?