Change in coreboot[master]: soc/intel/alderlake: Add the CnviDdrRfimDisable configuration

[Tim Wawrzynczak (Code Review)]

Attention is currently required from: Maulik V Vaghela, Rizwan Qureshi, Sumeet R Pawnikar, Subrata Banik, Sridhar Siricilla, Ronak Kanabar, Srinidhi N Kaushik, Patrick Rudolph.
Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58132 )

Change subject: soc/intel/alderlake: Add the CnviDdrRfimDisable configuration
......................................................................

Patch Set 6:

(2 comments)

File src/soc/intel/alderlake/chip.h:

https://review.coreboot.org/c/coreboot/+/58132/comment/6b2b1528_9be51613 
PS6, Line 532: /* CNVi DDR RFIM Enable/Disable
             : 	 * Default 0. Setting this to 1 disables CNVi DDR RFIM.
             : 	 */
             : 	bool CnviDdrRfimDisable;
I think we should invert the polarity of this, and have it be an `Enable` option

File src/soc/intel/alderlake/romstage/fsp_params.c:

https://review.coreboot.org/c/coreboot/+/58132/comment/8199b58f_3959a9ed 
PS6, Line 211: (config->CnviDdrRfimDisable)
nit: parentheses not required