Change in coreboot[master]: util/inteltool: spi: add Sunrise Point config registers

[Nico Huber (Code Review)]

Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39566 )

Change subject: util/inteltool: spi: add Sunrise Point config registers
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Patch Set 6: Code-Review+1

(1 comment)

https://review.coreboot.org/c/coreboot/+/39566/6/util/inteltool/spi.c 
File util/inteltool/spi.c:

https://review.coreboot.org/c/coreboot/+/39566/6/util/inteltool/spi.c@66 
PS6, Line 66: 	{ 0x00, 4, "BIOS_SPI_DID_VID - Device ID and Vendor ID" },
            : 	{ 0x04, 4, "BIOS_SPI_STS_CMD - Status and Command" },
            : 	{ 0x08, 4, "BIOS_SPI_CC_RID - Revision ID" },
            : 	{ 0x0c, 4, "BIOS_SPI_BIST_HTYPE_LT_CLS - BIST, Header Type, Latency Timer, Cache Line Size" },
            : 	{ 0x10, 4, "BIOS_SPI_BAR0 - SPI BAR0 MMIO" },
Does this make sense? those are standard PCI registers, `lspci` has nicer
output for them.