[S] Change in coreboot[master]: mb/msi/ms7d25: Disable DMI ASPM

[Michał Żygowski (Code Review)]

Attention is currently required from: Michał Kopeć.

Michał Żygowski has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/69826 )

Change subject: mb/msi/ms7d25: Disable DMI ASPM
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mb/msi/ms7d25: Disable DMI ASPM

Disable DMI link ASPM which can degrade performance of overall system.
Desktop does not need to be concerned that much about idle power
consumption.

Signed-off-by: Michał Żygowski 
Change-Id: I60af9d2ab2913db449059e1e007999fa2f307f5d
---
M src/mainboard/msi/ms7d25/mainboard.c
M src/mainboard/msi/ms7d25/romstage_fsp_params.c
2 files changed, 19 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/26/69826/1

diff --git a/src/mainboard/msi/ms7d25/mainboard.c b/src/mainboard/msi/ms7d25/mainboard.c
index 20b3817..9e676ce 100644
--- a/src/mainboard/msi/ms7d25/mainboard.c
+++ b/src/mainboard/msi/ms7d25/mainboard.c
@@ -86,6 +86,9 @@
    params->PcieRpFunctionSwap = 0;
    params->CpuPcieRpFunctionSwap = 0;

+	params->PchLegacyIoLowLatency = 1;
+	params->PchDmiAspmCtrl = 0;
+
    params->CpuPcieRpPmSci[0] = 1; // M2_1
    params->CpuPcieRpPmSci[1] = 1; // PCI_E1
    params->PcieRpPmSci[0]    = 1; // PCI_E2
diff --git a/src/mainboard/msi/ms7d25/romstage_fsp_params.c b/src/mainboard/msi/ms7d25/romstage_fsp_params.c
index b11991c..d176ac8 100644
--- a/src/mainboard/msi/ms7d25/romstage_fsp_params.c
+++ b/src/mainboard/msi/ms7d25/romstage_fsp_params.c
@@ -63,6 +63,8 @@
    memupd->FspmConfig.CpuPcieRpClockReqMsgEnable[1] = CONFIG(PCIEXP_CLK_PM);
    memupd->FspmConfig.CpuPcieRpClockReqMsgEnable[2] = CONFIG(PCIEXP_CLK_PM);
    memupd->FspmConfig.DmiMaxLinkSpeed = 4; // Gen4 speed, undocumented
+	memupd->FspmConfig.DmiAspm = 0;
+	memupd->FspmConfig.DmiAspmCtrl = 0;
    memupd->FspmConfig.SkipExtGfxScan = 0;

memupd->FspmConfig.PchHdaAudioLinkHdaEnable = 1;