[M] Change in coreboot[main]: via: Start template for VIA C7 w/ CX700 northbridge

[Elyes Haouas (Code Review)]

Elyes Haouas has uploaded a new patch set (#4) to the change originally created by Nico Huber. ( https://review.coreboot.org/c/coreboot/+/82765?usp=email )

Change subject: via: Start template for VIA C7 w/ CX700 northbridge
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via: Start template for VIA C7 w/ CX700 northbridge

The first steps to bring C7 and CX700 support back mainline. Most is
skeleton copied from the `min86' example.

The romstage entry is placed in the northbridge code, as that's where
we'll perform raminit. Support to read the FSB frequency is added right
away, same for a reset function (using CF9 reset), as both are required
for a minimal build test.

A mainboard VIA EPIA-EX is also introduced for build testing, and in
later stages boot testing as well.

Links:
DS: https://theretroweb.com/chip/documentation/via-cx700-datasheet-feb06-666c8b1...
PM: https://web.archive.org/web/20180616220857/http://linux.via.com.tw/support/b...

Change-Id: I66f678fae0d5a27bb09c0c6c702440900998e574
Signed-off-by: Nico Huber 
---
M src/cpu/Makefile.mk
A src/cpu/via/Kconfig
A src/cpu/via/Makefile.mk
A src/cpu/via/c7/Kconfig
A src/cpu/via/c7/Makefile.mk
A src/cpu/via/car/cache_as_ram.S
A src/cpu/via/car/exit_car.S
A src/mainboard/via/Kconfig
A src/mainboard/via/Kconfig.name
A src/mainboard/via/epia-ex/Kconfig
A src/mainboard/via/epia-ex/Kconfig.name
A src/mainboard/via/epia-ex/board_info.txt
A src/mainboard/via/epia-ex/devicetree.cb
A src/northbridge/via/cx700/Kconfig
A src/northbridge/via/cx700/Makefile.mk
A src/northbridge/via/cx700/chip.c
A src/northbridge/via/cx700/chipset.cb
A src/northbridge/via/cx700/clock.c
A src/northbridge/via/cx700/reset.c
A src/northbridge/via/cx700/romstage.c
20 files changed, 207 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/65/82765/4