Change in coreboot[master]: soc/intel: skl,cnl,icl,jsl,tgl: disable usb over-current pin by default

[Michael Niewöhner (Code Review)]

Hello  Felix Singer, build bot (Jenkins), Nico Huber, Patrick Georgi, Jeremy Soller, Christian Walter, Paul Menzel, Patrick Rudolph,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/45112

to look at the new patch set (#3).

Change subject: soc/intel: skl,cnl,icl,jsl,tgl: disable usb over-current pin by default
......................................................................

soc/intel: skl,cnl,icl,jsl,tgl: disable usb over-current pin by default

Fsp configures the USB over-current pin, regardless of the port being
configured as disabled. Thus, set the OC pin to 0xff ("disabled") in
this case.

This allows us to skip setting USBx_PORT_EMPTY in the devicetree for
disabled ports.

Change-Id: Ib8ea2ea26c0623d4db910e487b37255e907b299d
Signed-off-by: Michael Niewöhner 
---
M src/soc/intel/cannonlake/fsp_params.c
M src/soc/intel/icelake/fsp_params.c
M src/soc/intel/jasperlake/fsp_params.c
M src/soc/intel/skylake/chip.c
M src/soc/intel/tigerlake/fsp_params.c
5 files changed, 50 insertions(+), 30 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/12/45112/3