Change in ...coreboot[master]: [UNTESTED]soc/intel/braswell: Use native code to update BSP microcode
Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33563
Change subject: [UNTESTED]soc/intel/braswell: Use native code to update BSP microcode ......................................................................
[UNTESTED]soc/intel/braswell: Use native code to update BSP microcode
This removes the need to specify the microcode size and location in Kconfig.
Change-Id: I9a391a3956b30dd8727bec669cb79a0a8588d5f0 Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/drivers/intel/fsp1_1/cache_as_ram.S M src/mainboard/facebook/fbg1701/Kconfig M src/soc/intel/braswell/Kconfig 3 files changed, 10 insertions(+), 10 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/63/33563/1
diff --git a/src/drivers/intel/fsp1_1/cache_as_ram.S b/src/drivers/intel/fsp1_1/cache_as_ram.S index 3460b9d..733c523 100644 --- a/src/drivers/intel/fsp1_1/cache_as_ram.S +++ b/src/drivers/intel/fsp1_1/cache_as_ram.S @@ -53,6 +53,15 @@ * Find the FSP binary in cbfs. * Make a fake stack that has the return value back to this code. */ + +#if CONFIG(MICROCODE_UPDATE_PRE_RAM) +update_microcode: + /* put the return address in %esp */ + movl $end_microcode_update, %esp + jmp update_bsp_microcode +end_microcode_update: +#endif + lea fake_fsp_stack, %esp jmp find_fsp find_fsp_ret: diff --git a/src/mainboard/facebook/fbg1701/Kconfig b/src/mainboard/facebook/fbg1701/Kconfig index b3c589d..e92022b 100644 --- a/src/mainboard/facebook/fbg1701/Kconfig +++ b/src/mainboard/facebook/fbg1701/Kconfig @@ -56,16 +56,6 @@ hex default 0x00800000
-config CPU_MICROCODE_CBFS_LEN - hex - default 0x10C00 - help - This should be updated when the microcode patch changes. - -config CPU_MICROCODE_CBFS_LOC - hex - default 0xFFFE9400 - config MRC_SETTINGS_CACHE_SIZE hex default 0x08000 diff --git a/src/soc/intel/braswell/Kconfig b/src/soc/intel/braswell/Kconfig index 920179f83..45a0cf8 100644 --- a/src/soc/intel/braswell/Kconfig +++ b/src/soc/intel/braswell/Kconfig @@ -52,6 +52,7 @@ select CPU_INTEL_COMMON select SOUTHBRIDGE_INTEL_COMMON_SMBUS select C_ENVIRONMENT_BOOTBLOCK + select MICROCODE_UPDATE_PRE_RAM
config DCACHE_BSP_STACK_SIZE hex
Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33563 )
Change subject: [UNTESTED]soc/intel/braswell: Use native code to update BSP microcode ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/#/c/33563/1/src/mainboard/facebook/fbg1701/Kconf... File src/mainboard/facebook/fbg1701/Kconfig:
https://review.coreboot.org/#/c/33563/1/src/mainboard/facebook/fbg1701/Kconf... PS1, Line 55: : : unrelated:This spans the full flash. Does this even boot?
Matt DeVillier has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33563 )
Change subject: [UNTESTED]soc/intel/braswell: Use native code to update BSP microcode ......................................................................
Patch Set 1: Code-Review-1
fails to boot to console on google/cyan
Frans Hendriks has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33563 )
Change subject: [UNTESTED]soc/intel/braswell: Use native code to update BSP microcode ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/#/c/33563/1/src/mainboard/facebook/fbg1701/Kconf... File src/mainboard/facebook/fbg1701/Kconfig:
https://review.coreboot.org/#/c/33563/1/src/mainboard/facebook/fbg1701/Kconf... PS1, Line 55: : :
unrelated:This spans the full flash. […]
Yes, boot without problems. We use fmap.fmd CB:33484, so this value used anyware?
Frans Hendriks has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33563 )
Change subject: [UNTESTED]soc/intel/braswell: Use native code to update BSP microcode ......................................................................
Patch Set 1: Code-Review-1
Does not boot on Facebook FBG1701 either.
Arthur Heymans has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/33563 )
Change subject: [UNTESTED]soc/intel/braswell: Use native code to update BSP microcode ......................................................................
Abandoned
-
Arthur Heymans (Code Review) -
Frans Hendriks (Code Review)
-
Matt DeVillier (Code Review)