Matt DeVillier has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46137 )
Change subject: mb/google/jechto: Disable PCIe AER ......................................................................
mb/google/jechto: Disable PCIe AER
Ethernet hardware on jecht variants doesn't support AER, so disable it to mitigate continuous AER timeout errors in dmesg.
Change-Id: Ieda82c6e13c2bbc4b3a051a3d2a7ae90728ccdc6 Signed-off-by: Matt DeVillier matt.devillier@gmail.com --- M src/mainboard/google/jecht/Kconfig 1 file changed, 3 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/37/46137/1
diff --git a/src/mainboard/google/jecht/Kconfig b/src/mainboard/google/jecht/Kconfig index 7065081..4851bd7 100644 --- a/src/mainboard/google/jecht/Kconfig +++ b/src/mainboard/google/jecht/Kconfig @@ -56,4 +56,7 @@ string default "GOOGLE"
+config PCIEXP_AER + def_bool n + endif
Matt DeVillier has uploaded a new patch set (#2). ( https://review.coreboot.org/c/coreboot/+/46137 )
Change subject: mb/google/jecht: Disable PCIe AER ......................................................................
mb/google/jecht: Disable PCIe AER
Ethernet hardware on jecht variants doesn't support AER, so disable it to mitigate continuous AER timeout errors in dmesg.
Change-Id: Ieda82c6e13c2bbc4b3a051a3d2a7ae90728ccdc6 Signed-off-by: Matt DeVillier matt.devillier@gmail.com --- M src/mainboard/google/jecht/Kconfig 1 file changed, 3 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/37/46137/2
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46137 )
Change subject: mb/google/jecht: Disable PCIe AER ......................................................................
Patch Set 2: Code-Review+1
Hello build bot (Jenkins), Angel Pons,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/46137
to look at the new patch set (#3).
Change subject: mb/google/jecht: Disable PCIe AER ......................................................................
mb/google/jecht: Disable PCIe AER
Ethernet hardware on jecht variants doesn't support AER, so disable it to mitigate continuous AER timeout errors in dmesg:
pcieport 0000:00:1c.0: AER: Corrected error received: 0000:00:1c.0 pcieport 0000:00:1c.0: AER: PCIe Bus Error: severity=Corrected, type=Data Link Layer, (Transmitter ID) pcieport 0000:00:1c.0: AER: device [8086:9c94] error status/mask=00001000/00002000 pcieport 0000:00:1c.0: AER: [12] Timeout
Change-Id: Ieda82c6e13c2bbc4b3a051a3d2a7ae90728ccdc6 Signed-off-by: Matt DeVillier matt.devillier@gmail.com --- M src/mainboard/google/jecht/Kconfig 1 file changed, 3 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/37/46137/3
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46137 )
Change subject: mb/google/jecht: Disable PCIe AER ......................................................................
Patch Set 3: Code-Review+2
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/46137 )
Change subject: mb/google/jecht: Disable PCIe AER ......................................................................
mb/google/jecht: Disable PCIe AER
Ethernet hardware on jecht variants doesn't support AER, so disable it to mitigate continuous AER timeout errors in dmesg:
pcieport 0000:00:1c.0: AER: Corrected error received: 0000:00:1c.0 pcieport 0000:00:1c.0: AER: PCIe Bus Error: severity=Corrected, type=Data Link Layer, (Transmitter ID) pcieport 0000:00:1c.0: AER: device [8086:9c94] error status/mask=00001000/00002000 pcieport 0000:00:1c.0: AER: [12] Timeout
Change-Id: Ieda82c6e13c2bbc4b3a051a3d2a7ae90728ccdc6 Signed-off-by: Matt DeVillier matt.devillier@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/46137 Reviewed-by: Angel Pons th3fanbus@gmail.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/mainboard/google/jecht/Kconfig 1 file changed, 3 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved
diff --git a/src/mainboard/google/jecht/Kconfig b/src/mainboard/google/jecht/Kconfig index 7065081..4851bd7 100644 --- a/src/mainboard/google/jecht/Kconfig +++ b/src/mainboard/google/jecht/Kconfig @@ -56,4 +56,7 @@ string default "GOOGLE"
+config PCIEXP_AER + def_bool n + endif
-
Angel Pons (Code Review) -
Matt DeVillier (Code Review)
-
Patrick Georgi (Code Review)