Sean Rhodes has submitted this change. ( https://review.coreboot.org/c/coreboot/+/85704?usp=email )
Change subject: Revert "mb/starlabs/*: Disable c6dram" ......................................................................
Revert "mb/starlabs/*: Disable c6dram"
This reverts commit 9e3f614598ae9ede85fb9cdd436ae53c62cfdefd.
This is used for S3, so keep it in the devicetree.
Change-Id: If69bb946d31e842af9caf84470ddd32900e56456 Signed-off-by: Sean Rhodes sean@starlabs.systems Reviewed-on: https://review.coreboot.org/c/coreboot/+/85704 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Matt DeVillier matt.devillier@gmail.com --- M src/mainboard/starlabs/byte_adl/variants/mk_ii/devicetree.cb M src/mainboard/starlabs/starbook/variants/adl/devicetree.cb M src/mainboard/starlabs/starbook/variants/cml/devicetree.cb M src/mainboard/starlabs/starbook/variants/rpl/devicetree.cb M src/mainboard/starlabs/starbook/variants/tgl/devicetree.cb M src/mainboard/starlabs/starlite_adl/variants/mk_v/devicetree.cb 6 files changed, 6 insertions(+), 0 deletions(-)
Approvals: Matt DeVillier: Looks good to me, approved build bot (Jenkins): Verified
diff --git a/src/mainboard/starlabs/byte_adl/variants/mk_ii/devicetree.cb b/src/mainboard/starlabs/byte_adl/variants/mk_ii/devicetree.cb index 620b3f5..3443726 100644 --- a/src/mainboard/starlabs/byte_adl/variants/mk_ii/devicetree.cb +++ b/src/mainboard/starlabs/byte_adl/variants/mk_ii/devicetree.cb @@ -1,5 +1,6 @@ chip soc/intel/alderlake # FSP UPDs + register "enable_c6dram" = "true" register "eist_enable" = "true" register "cnvi_bt_audio_offload" = "true" register "cnvi_bt_core" = "true" diff --git a/src/mainboard/starlabs/starbook/variants/adl/devicetree.cb b/src/mainboard/starlabs/starbook/variants/adl/devicetree.cb index e525d47..8e1b498 100644 --- a/src/mainboard/starlabs/starbook/variants/adl/devicetree.cb +++ b/src/mainboard/starlabs/starbook/variants/adl/devicetree.cb @@ -1,6 +1,7 @@ chip soc/intel/alderlake # FSP UPDs register "eist_enable" = "true" + register "enable_c6dram" = "1" register "sagv" = "SaGv_Enabled"
# Serial I/O diff --git a/src/mainboard/starlabs/starbook/variants/cml/devicetree.cb b/src/mainboard/starlabs/starbook/variants/cml/devicetree.cb index d390a88..9593054 100644 --- a/src/mainboard/starlabs/starbook/variants/cml/devicetree.cb +++ b/src/mainboard/starlabs/starbook/variants/cml/devicetree.cb @@ -1,6 +1,7 @@ chip soc/intel/cannonlake # FSP UPDs register "eist_enable" = "true" + register "enable_c6dram" = "1" register "SaGv" = "SaGv_Enabled"
# Graphics diff --git a/src/mainboard/starlabs/starbook/variants/rpl/devicetree.cb b/src/mainboard/starlabs/starbook/variants/rpl/devicetree.cb index d84474b..613854f 100644 --- a/src/mainboard/starlabs/starbook/variants/rpl/devicetree.cb +++ b/src/mainboard/starlabs/starbook/variants/rpl/devicetree.cb @@ -3,6 +3,7 @@ register "disable_dynamic_tccold_handshake" = "true" register "eist_enable" = "true" register "enable_c1e" = "true" + register "enable_c6dram" = "true" register "sagv" = "SaGv_Enabled"
# Serial I/O diff --git a/src/mainboard/starlabs/starbook/variants/tgl/devicetree.cb b/src/mainboard/starlabs/starbook/variants/tgl/devicetree.cb index 8dfece7..7acd36a 100644 --- a/src/mainboard/starlabs/starbook/variants/tgl/devicetree.cb +++ b/src/mainboard/starlabs/starbook/variants/tgl/devicetree.cb @@ -1,6 +1,7 @@ chip soc/intel/tigerlake # FSP UPDs register "eist_enable" = "true" + register "enable_c6dram" = "1" register "CnviBtCore" = "true" register "CnviBtAudioOffload" = "1" register "SaGv" = "SaGv_Enabled" diff --git a/src/mainboard/starlabs/starlite_adl/variants/mk_v/devicetree.cb b/src/mainboard/starlabs/starlite_adl/variants/mk_v/devicetree.cb index 528df59..5674b33 100644 --- a/src/mainboard/starlabs/starlite_adl/variants/mk_v/devicetree.cb +++ b/src/mainboard/starlabs/starlite_adl/variants/mk_v/devicetree.cb @@ -2,6 +2,7 @@ # FSP UPDs register "cnvi_bt_audio_offload" = "true" register "cnvi_bt_core" = "true" + register "enable_c6dram" = "true" register "eist_enable" = "true" register "sagv" = "SaGv_Enabled"
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Sean Rhodes (Code Review)