[XL] Change in coreboot[master]: soc/intel/gpio: Change the GPIO device scope in ACPI to \_SB
Attention is currently required from: Eran Mitrani, Jakub Czapiga, Jonathon Hall, Kapil Porwal, Lean Sheng Tan, Nick Vaccaro, Subrata Banik, Tarun, Werner Zeh.
Michał Żygowski has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/77582?usp=email )
Change subject: soc/intel/gpio: Change the GPIO device scope in ACPI to _SB ......................................................................
soc/intel/gpio: Change the GPIO device scope in ACPI to _SB
Windows expects the GPIO device to be under _SB, not _SB.PCI0, otherwise it raises a yellow bang and an error indicating that the device could not find enough free resources (despite avoiding the SBREG BAR reservation in MCHC resources).
TEST=Boot Windows 11 on MSI PRO Z790-P and notice the yellow bang near GPIO device in Device Manager is gone.
Change-Id: I1e6259817eeb7bca833ed54834660544c819dc25 Signed-off-by: Michał Żygowski michal.zygowski@3mdeb.com --- M src/mainboard/purism/librem_cnl/variants/librem_mini/include/variant/acpi/variant.asl M src/soc/intel/alderlake/acpi/gpio.asl M src/soc/intel/alderlake/gpio.c M src/soc/intel/alderlake/gpio_pch_s.c M src/soc/intel/cannonlake/acpi/gpio.asl M src/soc/intel/cannonlake/acpi/gpio_cnp_h.asl M src/soc/intel/cannonlake/gpio.c M src/soc/intel/cannonlake/gpio_cnp_h.c M src/soc/intel/common/block/acpi/acpi/northbridge.asl M src/soc/intel/elkhartlake/acpi/gpio.asl M src/soc/intel/elkhartlake/gpio.c M src/soc/intel/jasperlake/acpi/gpio.asl M src/soc/intel/jasperlake/gpio.c M src/soc/intel/meteorlake/acpi/gpio.asl M src/soc/intel/meteorlake/gpio.c M src/soc/intel/tigerlake/acpi/gpio.asl M src/soc/intel/tigerlake/acpi/gpio_pch_h.asl M src/soc/intel/tigerlake/gpio.c M src/soc/intel/tigerlake/gpio_pch_h.c 19 files changed, 734 insertions(+), 710 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/82/77582/1
diff --git a/src/mainboard/purism/librem_cnl/variants/librem_mini/include/variant/acpi/variant.asl b/src/mainboard/purism/librem_cnl/variants/librem_mini/include/variant/acpi/variant.asl index ea7be7d..06d40ea 100644 --- a/src/mainboard/purism/librem_cnl/variants/librem_mini/include/variant/acpi/variant.asl +++ b/src/mainboard/purism/librem_cnl/variants/librem_mini/include/variant/acpi/variant.asl @@ -30,7 +30,7 @@ 0, // Debounce timeout 0, // Drive strength IoRestrictionOutputOnly, // Only used as output - "\_SB.PCI0.GPIO", // GPIO controller + "\_SB.GPIO", // GPIO controller 0) // Must be 0 { 296, // GPP_E8 - STATUSLED# diff --git a/src/soc/intel/alderlake/acpi/gpio.asl b/src/soc/intel/alderlake/acpi/gpio.asl index b57e41a..16fb305 100644 --- a/src/soc/intel/alderlake/acpi/gpio.asl +++ b/src/soc/intel/alderlake/acpi/gpio.asl @@ -5,125 +5,128 @@ #include <soc/irq.h> #include <soc/pcr_ids.h>
-Device (GPIO) +Scope (_SB) { - Name (_HID, CROS_GPIO_NAME) - Name (_UID, 0) - Name (_DDN, "GPIO Controller") - - Name (RBUF, ResourceTemplate() + Device (GPIO) { - Memory32Fixed (ReadWrite, 0, 0, COM0) - Memory32Fixed (ReadWrite, 0, 0, COM1) + Name (_HID, CROS_GPIO_NAME) + Name (_UID, 0) + Name (_DDN, "GPIO Controller") + + Name (RBUF, ResourceTemplate() + { + Memory32Fixed (ReadWrite, 0, 0, COM0) + Memory32Fixed (ReadWrite, 0, 0, COM1) #if CONFIG(SOC_INTEL_ALDERLAKE_PCH_S) - Memory32Fixed (ReadWrite, 0, 0, COM3) + Memory32Fixed (ReadWrite, 0, 0, COM3) #endif - Memory32Fixed (ReadWrite, 0, 0, COM4) - Memory32Fixed (ReadWrite, 0, 0, COM5) - Interrupt (ResourceConsumer, Level, ActiveLow, Shared,,, GIRQ) - { GPIO_IRQ14 } - }) - Method (_CRS, 0, NotSerialized) - { - /* GPIO Community 0 */ - CreateDWordField (^RBUF, ^COM0._BAS, BAS0) - CreateDWordField (^RBUF, ^COM0._LEN, LEN0) - BAS0 = ^^PCRB (PID_GPIOCOM0) - LEN0 = GPIO_BASE_SIZE + Memory32Fixed (ReadWrite, 0, 0, COM4) + Memory32Fixed (ReadWrite, 0, 0, COM5) + Interrupt (ResourceConsumer, Level, ActiveLow, Shared,,, GIRQ) + { GPIO_IRQ14 } + }) + Method (_CRS, 0, NotSerialized) + { + /* GPIO Community 0 */ + CreateDWordField (^RBUF, ^COM0._BAS, BAS0) + CreateDWordField (^RBUF, ^COM0._LEN, LEN0) + BAS0 = ^^PCI0.PCRB (PID_GPIOCOM0) + LEN0 = GPIO_BASE_SIZE
- /* GPIO Community 1 */ - CreateDWordField (^RBUF, ^COM1._BAS, BAS1) - CreateDWordField (^RBUF, ^COM1._LEN, LEN1) - BAS1 = ^^PCRB (PID_GPIOCOM1) - LEN1 = GPIO_BASE_SIZE + /* GPIO Community 1 */ + CreateDWordField (^RBUF, ^COM1._BAS, BAS1) + CreateDWordField (^RBUF, ^COM1._LEN, LEN1) + BAS1 = ^^PCI0.PCRB (PID_GPIOCOM1) + LEN1 = GPIO_BASE_SIZE
#if CONFIG(SOC_INTEL_ALDERLAKE_PCH_S) - /* GPIO Community 3 */ - CreateDWordField (^RBUF, ^COM3._BAS, BAS3) - CreateDWordField (^RBUF, ^COM3._LEN, LEN3) - BAS3 = ^^PCRB (PID_GPIOCOM3) - LEN3 = GPIO_BASE_SIZE + /* GPIO Community 3 */ + CreateDWordField (^RBUF, ^COM3._BAS, BAS3) + CreateDWordField (^RBUF, ^COM3._LEN, LEN3) + BAS3 = ^^PCI0.PCRB (PID_GPIOCOM3) + LEN3 = GPIO_BASE_SIZE #endif
- /* GPIO Community 4 */ - CreateDWordField (^RBUF, ^COM4._BAS, BAS4) - CreateDWordField (^RBUF, ^COM4._LEN, LEN4) - BAS4 = ^^PCRB (PID_GPIOCOM4) - LEN4 = GPIO_BASE_SIZE + /* GPIO Community 4 */ + CreateDWordField (^RBUF, ^COM4._BAS, BAS4) + CreateDWordField (^RBUF, ^COM4._LEN, LEN4) + BAS4 = ^^PCI0.PCRB (PID_GPIOCOM4) + LEN4 = GPIO_BASE_SIZE
- /* GPIO Community 5 */ - CreateDWordField (^RBUF, ^COM5._BAS, BAS5) - CreateDWordField (^RBUF, ^COM5._LEN, LEN5) - BAS5 = ^^PCRB (PID_GPIOCOM5) - LEN5 = GPIO_BASE_SIZE + /* GPIO Community 5 */ + CreateDWordField (^RBUF, ^COM5._BAS, BAS5) + CreateDWordField (^RBUF, ^COM5._LEN, LEN5) + BAS5 = ^^PCI0.PCRB (PID_GPIOCOM5) + LEN5 = GPIO_BASE_SIZE
- Return (RBUF) - } + Return (RBUF) + }
- Name (SBRT, ResourceTemplate() - { - /* PCH_RESERVED/SBREG BAR resource split into 3 with GPIO holes */ - DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, - Cacheable, ReadWrite, - 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00000000,,, SBR1) + Name (SBRT, ResourceTemplate() + { + /* PCH_RESERVED/SBREG BAR resource split into 3 with GPIO holes */ + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, + Cacheable, ReadWrite, + 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000,,, SBR1)
- DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, - Cacheable, ReadWrite, - 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00000000,,, SBR2) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, + Cacheable, ReadWrite, + 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000,,, SBR2)
- DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, - Cacheable, ReadWrite, - 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00000000,,, SBR3) - }) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, + Cacheable, ReadWrite, + 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000,,, SBR3) + })
- Method (SBRS, 0, NotSerialized) - { - CreateDwordField (^SBRT, ^SBR1._MIN, MIN1) - CreateDwordField (^SBRT, ^SBR1._MAX, MAX1) - CreateDwordField (^SBRT, ^SBR1._LEN, LEN1) + Method (SBRS, 0, NotSerialized) + { + CreateDwordField (^SBRT, ^SBR1._MIN, MIN1) + CreateDwordField (^SBRT, ^SBR1._MAX, MAX1) + CreateDwordField (^SBRT, ^SBR1._LEN, LEN1)
- /* Starting with the last community which have the lowest PID */ + /* Starting with the last community which have the lowest PID */ #if CONFIG(SOC_INTEL_ALDERLAKE_PCH_S) - MIN1 = P2SB_BAR + MIN1 = P2SB_BAR #else - MIN1 = PCH_PRESERVED_BASE_ADDRESS + MIN1 = PCH_PRESERVED_BASE_ADDRESS #endif - MAX1 = ^^PCRB (PID_GPIOCOM5) - 1 - LEN1 = MAX1 - MIN1 + 1 + MAX1 = ^^PCI0.PCRB (PID_GPIOCOM5) - 1 + LEN1 = MAX1 - MIN1 + 1
- CreateDwordField (^SBRT, ^SBR2._MIN, MIN2) - CreateDwordField (^SBRT, ^SBR2._MAX, MAX2) - CreateDwordField (^SBRT, ^SBR2._LEN, LEN2) + CreateDwordField (^SBRT, ^SBR2._MIN, MIN2) + CreateDwordField (^SBRT, ^SBR2._MAX, MAX2) + CreateDwordField (^SBRT, ^SBR2._LEN, LEN2)
#if CONFIG(SOC_INTEL_ALDERLAKE_PCH_S) - MIN2 = ^^PCRB (PID_GPIOCOM3) + GPIO_BASE_SIZE + MIN2 = ^^PCI0.PCRB (PID_GPIOCOM3) + GPIO_BASE_SIZE #else - MIN2 = ^^PCRB (PID_GPIOCOM4) + GPIO_BASE_SIZE + MIN2 = ^^PCI0.PCRB (PID_GPIOCOM4) + GPIO_BASE_SIZE #endif - MAX2 = ^^PCRB (PID_GPIOCOM1) - 1 - LEN2 = MAX2 - MIN2 + 1 + MAX2 = ^^PCI0.PCRB (PID_GPIOCOM1) - 1 + LEN2 = MAX2 - MIN2 + 1
- CreateDwordField (^SBRT, ^SBR3._MIN, MIN3) - CreateDwordField (^SBRT, ^SBR3._MAX, MAX3) - CreateDwordField (^SBRT, ^SBR3._LEN, LEN3) + CreateDwordField (^SBRT, ^SBR3._MIN, MIN3) + CreateDwordField (^SBRT, ^SBR3._MAX, MAX3) + CreateDwordField (^SBRT, ^SBR3._LEN, LEN3)
- MIN3 = ^^PCRB (PID_GPIOCOM0) + GPIO_BASE_SIZE + MIN3 = ^^PCI0.PCRB (PID_GPIOCOM0) + GPIO_BASE_SIZE #if CONFIG(SOC_INTEL_ALDERLAKE_PCH_S) - MAX3 = P2SB_BAR + P2SB_SIZE - 1 + MAX3 = P2SB_BAR + P2SB_SIZE - 1 #else - MAX3 = PCH_PRESERVED_BASE_ADDRESS + PCH_PRESERVED_BASE_SIZE - 1 + MAX3 = PCH_PRESERVED_BASE_ADDRESS + PCH_PRESERVED_BASE_SIZE - 1 #endif - LEN3 = MAX3 - MIN3 + 1 + LEN3 = MAX3 - MIN3 + 1
- Return (SBRT) - } + Return (SBRT) + }
- Method (_STA, 0, NotSerialized) - { - Return (0xF) + Method (_STA, 0, NotSerialized) + { + Return (0xF) + } } }
diff --git a/src/soc/intel/alderlake/gpio.c b/src/soc/intel/alderlake/gpio.c index 38774b1..db4564b 100644 --- a/src/soc/intel/alderlake/gpio.c +++ b/src/soc/intel/alderlake/gpio.c @@ -115,7 +115,7 @@ .gpi_smi_en_reg_0 = GPI_SMI_EN_0, .max_pads_per_group = GPIO_MAX_NUM_PER_GROUP, .name = "GPP_BTA", - .acpi_path = "\_SB.PCI0.GPIO", + .acpi_path = "\_SB.GPIO", .reset_map = rst_map_gpp, .num_reset_vals = ARRAY_SIZE(rst_map_gpp), .groups = adl_community0_groups, @@ -146,7 +146,7 @@ #else .name = "GPP_SDH", #endif - .acpi_path = "\_SB.PCI0.GPIO", + .acpi_path = "\_SB.GPIO", .reset_map = rst_map_gpp, .num_reset_vals = ARRAY_SIZE(rst_map_gpp), .groups = adl_community1_groups, @@ -171,7 +171,7 @@ .gpi_smi_en_reg_0 = GPI_SMI_EN_0, .max_pads_per_group = GPIO_MAX_NUM_PER_GROUP, .name = "GPD", - .acpi_path = "\_SB.PCI0.GPIO", + .acpi_path = "\_SB.GPIO", .reset_map = rst_map_gpd, .num_reset_vals = ARRAY_SIZE(rst_map_gpd), .groups = adl_community2_groups, @@ -193,7 +193,7 @@ .gpi_smi_en_reg_0 = GPI_SMI_EN_0, .max_pads_per_group = GPIO_MAX_NUM_PER_GROUP, .name = "GPP_VGPIO", - .acpi_path = "\_SB.PCI0.GPIO", + .acpi_path = "\_SB.GPIO", .reset_map = rst_map_gpp, .num_reset_vals = ARRAY_SIZE(rst_map_gpp), .groups = adl_community3_groups, @@ -216,7 +216,7 @@ .gpi_smi_en_reg_0 = GPI_SMI_EN_0, .max_pads_per_group = GPIO_MAX_NUM_PER_GROUP, .name = "GPP_FCE", - .acpi_path = "\_SB.PCI0.GPIO", + .acpi_path = "\_SB.GPIO", .reset_map = rst_map_gpp, .num_reset_vals = ARRAY_SIZE(rst_map_gpp), .groups = adl_community4_groups, @@ -242,7 +242,7 @@ .gpi_smi_en_reg_0 = GPI_SMI_EN_0, .max_pads_per_group = GPIO_MAX_NUM_PER_GROUP, .name = "GPP_RSPI0", - .acpi_path = "\_SB.PCI0.GPIO", + .acpi_path = "\_SB.GPIO", .reset_map = rst_map_gpp, .num_reset_vals = ARRAY_SIZE(rst_map_gpp), .groups = adl_community5_groups, diff --git a/src/soc/intel/alderlake/gpio_pch_s.c b/src/soc/intel/alderlake/gpio_pch_s.c index d49daeb..3a54739 100644 --- a/src/soc/intel/alderlake/gpio_pch_s.c +++ b/src/soc/intel/alderlake/gpio_pch_s.c @@ -111,7 +111,7 @@ .gpi_smi_en_reg_0 = GPI_SMI_EN_0, .max_pads_per_group = GPIO_MAX_NUM_PER_GROUP, .name = "GPP_IRJ", - .acpi_path = "\_SB.PCI0.GPIO", + .acpi_path = "\_SB.GPIO", .reset_map = rst_map_gpp, .num_reset_vals = ARRAY_SIZE(rst_map_gpp), .groups = adl_community0_groups, @@ -135,7 +135,7 @@ .gpi_smi_en_reg_0 = GPI_SMI_EN_0, .max_pads_per_group = GPIO_MAX_NUM_PER_GROUP, .name = "GPP_BGH", - .acpi_path = "\_SB.PCI0.GPIO", + .acpi_path = "\_SB.GPIO", .reset_map = rst_map_gpp, .num_reset_vals = ARRAY_SIZE(rst_map_gpp), .groups = adl_community1_groups, @@ -158,7 +158,7 @@ .gpi_smi_en_reg_0 = GPI_SMI_EN_0, .max_pads_per_group = GPIO_MAX_NUM_PER_GROUP, .name = "GPD", - .acpi_path = "\_SB.PCI0.GPIO", + .acpi_path = "\_SB.GPIO", .reset_map = rst_map_gpd, .num_reset_vals = ARRAY_SIZE(rst_map_gpd), .groups = adl_community2_groups, @@ -178,7 +178,7 @@ .gpi_smi_en_reg_0 = GPI_SMI_EN_0, .max_pads_per_group = GPIO_MAX_NUM_PER_GROUP, .name = "GPP_AC", - .acpi_path = "\_SB.PCI0.GPIO", + .acpi_path = "\_SB.GPIO", .reset_map = rst_map_gpp, .num_reset_vals = ARRAY_SIZE(rst_map_gpp), .groups = adl_community3_groups, @@ -202,7 +202,7 @@ .gpi_smi_en_reg_0 = GPI_SMI_EN_0, .max_pads_per_group = GPIO_MAX_NUM_PER_GROUP, .name = "GPP_SEKF", - .acpi_path = "\_SB.PCI0.GPIO", + .acpi_path = "\_SB.GPIO", .reset_map = rst_map_gpp, .num_reset_vals = ARRAY_SIZE(rst_map_gpp), .groups = adl_community4_groups, @@ -226,7 +226,7 @@ .gpi_smi_en_reg_0 = GPI_SMI_EN_0, .max_pads_per_group = GPIO_MAX_NUM_PER_GROUP, .name = "GPP_D", - .acpi_path = "\_SB.PCI0.GPIO", + .acpi_path = "\_SB.GPIO", .reset_map = rst_map_gpp, .num_reset_vals = ARRAY_SIZE(rst_map_gpp), .groups = adl_community5_groups, diff --git a/src/soc/intel/cannonlake/acpi/gpio.asl b/src/soc/intel/cannonlake/acpi/gpio.asl index adf6825..cba9ff8 100644 --- a/src/soc/intel/cannonlake/acpi/gpio.asl +++ b/src/soc/intel/cannonlake/acpi/gpio.asl @@ -4,101 +4,104 @@ #include <soc/irq.h> #include <soc/pcr_ids.h>
-Device (GPIO) +Scope (_SB) { - Name (_HID, "INT34BB") - Name (_UID, 0) - Name (_DDN, "GPIO Controller") - - Name (RBUF, ResourceTemplate() + Device (GPIO) { - Memory32Fixed (ReadWrite, 0, 0, COM0) - Memory32Fixed (ReadWrite, 0, 0, COM1) - Memory32Fixed (ReadWrite, 0, 0, COM4) - Interrupt (ResourceConsumer, Level, ActiveLow, Shared,,, GIRQ) - { GPIO_IRQ14 } - }) + Name (_HID, "INT34BB") + Name (_UID, 0) + Name (_DDN, "GPIO Controller")
- /* - * GPIO communities 0, 1, and 4 are exported for the OS. - * This is based on the Linux kernel provided community map at - * drivers/pinctrl/intel/pinctrl-cannonlake.c:cnllp_communities[] - */ - Method (_CRS, 0, NotSerialized) - { - /* GPIO Community 0 */ - CreateDWordField (^RBUF, ^COM0._BAS, BAS0) - CreateDWordField (^RBUF, ^COM0._LEN, LEN0) - BAS0 = ^^PCRB (PID_GPIOCOM0) - LEN0 = GPIO_BASE_SIZE + Name (RBUF, ResourceTemplate() + { + Memory32Fixed (ReadWrite, 0, 0, COM0) + Memory32Fixed (ReadWrite, 0, 0, COM1) + Memory32Fixed (ReadWrite, 0, 0, COM4) + Interrupt (ResourceConsumer, Level, ActiveLow, Shared,,, GIRQ) + { GPIO_IRQ14 } + })
- /* GPIO Community 1 */ - CreateDWordField (^RBUF, ^COM1._BAS, BAS1) - CreateDWordField (^RBUF, ^COM1._LEN, LEN1) - BAS1 = ^^PCRB (PID_GPIOCOM1) - LEN1 = GPIO_BASE_SIZE + /* + * GPIO communities 0, 1, and 4 are exported for the OS. + * This is based on the Linux kernel provided community map at + * drivers/pinctrl/intel/pinctrl-cannonlake.c:cnllp_communities[] + */ + Method (_CRS, 0, NotSerialized) + { + /* GPIO Community 0 */ + CreateDWordField (^RBUF, ^COM0._BAS, BAS0) + CreateDWordField (^RBUF, ^COM0._LEN, LEN0) + BAS0 = ^^PCI0.PCRB (PID_GPIOCOM0) + LEN0 = GPIO_BASE_SIZE
- /* GPIO Community 4 */ - CreateDWordField (^RBUF, ^COM4._BAS, BAS4) - CreateDWordField (^RBUF, ^COM4._LEN, LEN4) - BAS4 = ^^PCRB (PID_GPIOCOM4) - LEN4 = GPIO_BASE_SIZE + /* GPIO Community 1 */ + CreateDWordField (^RBUF, ^COM1._BAS, BAS1) + CreateDWordField (^RBUF, ^COM1._LEN, LEN1) + BAS1 = ^^PCI0.PCRB (PID_GPIOCOM1) + LEN1 = GPIO_BASE_SIZE
- Return (RBUF) - } + /* GPIO Community 4 */ + CreateDWordField (^RBUF, ^COM4._BAS, BAS4) + CreateDWordField (^RBUF, ^COM4._LEN, LEN4) + BAS4 = ^^PCI0.PCRB (PID_GPIOCOM4) + LEN4 = GPIO_BASE_SIZE
- Name (SBRT, ResourceTemplate() - { - /* PCH reserved resource split into 3 with GPIO holes */ - DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, - Cacheable, ReadWrite, - 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00000000,,, SBR1) + Return (RBUF) + }
- DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, - Cacheable, ReadWrite, - 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00000000,,, SBR2) + Name (SBRT, ResourceTemplate() + { + /* PCH reserved resource split into 3 with GPIO holes */ + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, + Cacheable, ReadWrite, + 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000,,, SBR1)
- DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, - Cacheable, ReadWrite, - 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00000000,,, SBR3) - }) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, + Cacheable, ReadWrite, + 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000,,, SBR2)
- Method (SBRS, 0, NotSerialized) - { - CreateDwordField (^SBRT, ^SBR1._MIN, MIN1) - CreateDwordField (^SBRT, ^SBR1._MAX, MAX1) - CreateDwordField (^SBRT, ^SBR1._LEN, LEN1) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, + Cacheable, ReadWrite, + 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000,,, SBR3) + })
- /* Starting with the last community which have the lowest PID */ - MIN1 = PCH_PRESERVED_BASE_ADDRESS - MAX1 = ^^PCRB (PID_GPIOCOM4) - 1 - LEN1 = MAX1 - MIN1 + 1 + Method (SBRS, 0, NotSerialized) + { + CreateDwordField (^SBRT, ^SBR1._MIN, MIN1) + CreateDwordField (^SBRT, ^SBR1._MAX, MAX1) + CreateDwordField (^SBRT, ^SBR1._LEN, LEN1)
- CreateDwordField (^SBRT, ^SBR2._MIN, MIN2) - CreateDwordField (^SBRT, ^SBR2._MAX, MAX2) - CreateDwordField (^SBRT, ^SBR2._LEN, LEN2) + /* Starting with the last community which have the lowest PID */ + MIN1 = PCH_PRESERVED_BASE_ADDRESS + MAX1 = ^^PCI0.PCRB (PID_GPIOCOM4) - 1 + LEN1 = MAX1 - MIN1 + 1
- MIN2 = ^^PCRB (PID_GPIOCOM4) + GPIO_BASE_SIZE - MAX2 = ^^PCRB (PID_GPIOCOM1) - 1 - LEN2 = MAX2 - MIN2 + 1 + CreateDwordField (^SBRT, ^SBR2._MIN, MIN2) + CreateDwordField (^SBRT, ^SBR2._MAX, MAX2) + CreateDwordField (^SBRT, ^SBR2._LEN, LEN2)
- CreateDwordField (^SBRT, ^SBR3._MIN, MIN3) - CreateDwordField (^SBRT, ^SBR3._MAX, MAX3) - CreateDwordField (^SBRT, ^SBR3._LEN, LEN3) + MIN2 = ^^PCI0.PCRB (PID_GPIOCOM4) + GPIO_BASE_SIZE + MAX2 = ^^PCI0.PCRB (PID_GPIOCOM1) - 1 + LEN2 = MAX2 - MIN2 + 1
- MIN3 = ^^PCRB (PID_GPIOCOM0) + GPIO_BASE_SIZE - MAX3 = PCH_PRESERVED_BASE_ADDRESS + PCH_PRESERVED_BASE_SIZE - 1 - LEN3 = MAX3 - MIN3 + 1 + CreateDwordField (^SBRT, ^SBR3._MIN, MIN3) + CreateDwordField (^SBRT, ^SBR3._MAX, MAX3) + CreateDwordField (^SBRT, ^SBR3._LEN, LEN3)
- Return (SBRT) - } + MIN3 = ^^PCI0.PCRB (PID_GPIOCOM0) + GPIO_BASE_SIZE + MAX3 = PCH_PRESERVED_BASE_ADDRESS + PCH_PRESERVED_BASE_SIZE - 1 + LEN3 = MAX3 - MIN3 + 1
- Method (_STA, 0, NotSerialized) - { - Return (0xF) + Return (SBRT) + } + + Method (_STA, 0, NotSerialized) + { + Return (0xF) + } } }
diff --git a/src/soc/intel/cannonlake/acpi/gpio_cnp_h.asl b/src/soc/intel/cannonlake/acpi/gpio_cnp_h.asl index 7031b6a..4baa2b2 100644 --- a/src/soc/intel/cannonlake/acpi/gpio_cnp_h.asl +++ b/src/soc/intel/cannonlake/acpi/gpio_cnp_h.asl @@ -4,108 +4,111 @@ #include <soc/irq.h> #include <soc/pcr_ids.h>
-Device (GPIO) +Scope (_SB) { - Name (_HID, "INT3450") - Name (_UID, 0) - Name (_DDN, "GPIO Controller") - - Name (RBUF, ResourceTemplate() + Device (GPIO) { - Memory32Fixed (ReadWrite, 0, 0, COM0) - Memory32Fixed (ReadWrite, 0, 0, COM1) - Memory32Fixed (ReadWrite, 0, 0, COM3) - Memory32Fixed (ReadWrite, 0, 0, COM4) - Interrupt (ResourceConsumer, Level, ActiveLow, Shared,,, GIRQ) - { GPIO_IRQ14 } - }) + Name (_HID, "INT3450") + Name (_UID, 0) + Name (_DDN, "GPIO Controller")
- /* - * GPIO communities 0, 1, 3, and 4 are exported for the OS. - * This is based on the Linux kernel provided community map at - * drivers/pinctrl/intel/pinctrl-cannonlake.c:cnhl_communities[] - */ - Method (_CRS, 0, NotSerialized) - { - /* GPIO Community 0 */ - CreateDWordField (^RBUF, ^COM0._BAS, BAS0) - CreateDWordField (^RBUF, ^COM0._LEN, LEN0) - BAS0 = ^^PCRB (PID_GPIOCOM0) - LEN0 = GPIO_BASE_SIZE + Name (RBUF, ResourceTemplate() + { + Memory32Fixed (ReadWrite, 0, 0, COM0) + Memory32Fixed (ReadWrite, 0, 0, COM1) + Memory32Fixed (ReadWrite, 0, 0, COM3) + Memory32Fixed (ReadWrite, 0, 0, COM4) + Interrupt (ResourceConsumer, Level, ActiveLow, Shared,,, GIRQ) + { GPIO_IRQ14 } + })
- /* GPIO Community 1 */ - CreateDWordField (^RBUF, ^COM1._BAS, BAS1) - CreateDWordField (^RBUF, ^COM1._LEN, LEN1) - BAS1 = ^^PCRB (PID_GPIOCOM1) - LEN1 = GPIO_BASE_SIZE + /* + * GPIO communities 0, 1, 3, and 4 are exported for the OS. + * This is based on the Linux kernel provided community map at + * drivers/pinctrl/intel/pinctrl-cannonlake.c:cnhl_communities[] + */ + Method (_CRS, 0, NotSerialized) + { + /* GPIO Community 0 */ + CreateDWordField (^RBUF, ^COM0._BAS, BAS0) + CreateDWordField (^RBUF, ^COM0._LEN, LEN0) + BAS0 = ^^PCI0.PCRB (PID_GPIOCOM0) + LEN0 = GPIO_BASE_SIZE
- /* GPIO Community 3 */ - CreateDWordField (^RBUF, ^COM3._BAS, BAS3) - CreateDWordField (^RBUF, ^COM3._LEN, LEN3) - BAS3 = ^^PCRB (PID_GPIOCOM3) - LEN3 = GPIO_BASE_SIZE + /* GPIO Community 1 */ + CreateDWordField (^RBUF, ^COM1._BAS, BAS1) + CreateDWordField (^RBUF, ^COM1._LEN, LEN1) + BAS1 = ^^PCI0.PCRB (PID_GPIOCOM1) + LEN1 = GPIO_BASE_SIZE
- /* GPIO Community 4 */ - CreateDWordField (^RBUF, ^COM4._BAS, BAS4) - CreateDWordField (^RBUF, ^COM4._LEN, LEN4) - BAS4 = ^^PCRB (PID_GPIOCOM4) - LEN4 = GPIO_BASE_SIZE + /* GPIO Community 3 */ + CreateDWordField (^RBUF, ^COM3._BAS, BAS3) + CreateDWordField (^RBUF, ^COM3._LEN, LEN3) + BAS3 = ^^PCI0.PCRB (PID_GPIOCOM3) + LEN3 = GPIO_BASE_SIZE
- Return (RBUF) - } + /* GPIO Community 4 */ + CreateDWordField (^RBUF, ^COM4._BAS, BAS4) + CreateDWordField (^RBUF, ^COM4._LEN, LEN4) + BAS4 = ^^PCI0.PCRB (PID_GPIOCOM4) + LEN4 = GPIO_BASE_SIZE
- Name (SBRT, ResourceTemplate() - { - /* PCH reserved resource split into 3 with GPIO holes */ - DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, - Cacheable, ReadWrite, - 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00000000,,, SBR1) + Return (RBUF) + }
- DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, - Cacheable, ReadWrite, - 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00000000,,, SBR2) + Name (SBRT, ResourceTemplate() + { + /* PCH reserved resource split into 3 with GPIO holes */ + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, + Cacheable, ReadWrite, + 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000,,, SBR1)
- DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, - Cacheable, ReadWrite, - 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00000000,,, SBR3) - }) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, + Cacheable, ReadWrite, + 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000,,, SBR2)
- Method (SBRS, 0, NotSerialized) - { - CreateDwordField (^SBRT, ^SBR1._MIN, MIN1) - CreateDwordField (^SBRT, ^SBR1._MAX, MAX1) - CreateDwordField (^SBRT, ^SBR1._LEN, LEN1) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, + Cacheable, ReadWrite, + 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000,,, SBR3) + })
- /* Starting with the last community which have the lowest PID */ - MIN1 = PCH_PRESERVED_BASE_ADDRESS - MAX1 = ^^PCRB (PID_GPIOCOM4) - 1 - LEN1 = MAX1 - MIN1 + 1 + Method (SBRS, 0, NotSerialized) + { + CreateDwordField (^SBRT, ^SBR1._MIN, MIN1) + CreateDwordField (^SBRT, ^SBR1._MAX, MAX1) + CreateDwordField (^SBRT, ^SBR1._LEN, LEN1)
- CreateDwordField (^SBRT, ^SBR2._MIN, MIN2) - CreateDwordField (^SBRT, ^SBR2._MAX, MAX2) - CreateDwordField (^SBRT, ^SBR2._LEN, LEN2) + /* Starting with the last community which have the lowest PID */ + MIN1 = PCH_PRESERVED_BASE_ADDRESS + MAX1 = ^^PCI0.PCRB (PID_GPIOCOM4) - 1 + LEN1 = MAX1 - MIN1 + 1
- MIN2 = ^^PCRB (PID_GPIOCOM3) + GPIO_BASE_SIZE - MAX2 = ^^PCRB (PID_GPIOCOM1) - 1 - LEN2 = MAX2 - MIN2 + 1 + CreateDwordField (^SBRT, ^SBR2._MIN, MIN2) + CreateDwordField (^SBRT, ^SBR2._MAX, MAX2) + CreateDwordField (^SBRT, ^SBR2._LEN, LEN2)
- CreateDwordField (^SBRT, ^SBR3._MIN, MIN3) - CreateDwordField (^SBRT, ^SBR3._MAX, MAX3) - CreateDwordField (^SBRT, ^SBR3._LEN, LEN3) + MIN2 = ^^PCI0.PCRB (PID_GPIOCOM3) + GPIO_BASE_SIZE + MAX2 = ^^PCI0.PCRB (PID_GPIOCOM1) - 1 + LEN2 = MAX2 - MIN2 + 1
- MIN3 = ^^PCRB (PID_GPIOCOM0) + GPIO_BASE_SIZE - MAX3 = PCH_PRESERVED_BASE_ADDRESS + PCH_PRESERVED_BASE_SIZE - 1 - LEN3 = MAX3 - MIN3 + 1 + CreateDwordField (^SBRT, ^SBR3._MIN, MIN3) + CreateDwordField (^SBRT, ^SBR3._MAX, MAX3) + CreateDwordField (^SBRT, ^SBR3._LEN, LEN3)
- Return (SBRT) - } + MIN3 = ^^PCI0.PCRB (PID_GPIOCOM0) + GPIO_BASE_SIZE + MAX3 = PCH_PRESERVED_BASE_ADDRESS + PCH_PRESERVED_BASE_SIZE - 1 + LEN3 = MAX3 - MIN3 + 1
- Method (_STA, 0, NotSerialized) - { - Return (0xF) + Return (SBRT) + } + + Method (_STA, 0, NotSerialized) + { + Return (0xF) + } } }
diff --git a/src/soc/intel/cannonlake/gpio.c b/src/soc/intel/cannonlake/gpio.c index 93a71e0..3d3c9e7 100644 --- a/src/soc/intel/cannonlake/gpio.c +++ b/src/soc/intel/cannonlake/gpio.c @@ -82,7 +82,7 @@ .gpi_nmi_en_reg_0 = GPI_NMI_EN_0, .max_pads_per_group = GPIO_MAX_NUM_PER_GROUP, .name = "GPP_ABG", - .acpi_path = "\_SB.PCI0.GPIO", + .acpi_path = "\_SB.GPIO", .reset_map = rst_map_com0, .num_reset_vals = ARRAY_SIZE(rst_map_com0), .groups = cnl_community0_groups, @@ -106,7 +106,7 @@ .gpi_nmi_en_reg_0 = GPI_NMI_EN_0, .max_pads_per_group = GPIO_MAX_NUM_PER_GROUP, .name = "GPP_DFH", - .acpi_path = "\_SB.PCI0.GPIO", + .acpi_path = "\_SB.GPIO", .reset_map = rst_map, .num_reset_vals = ARRAY_SIZE(rst_map), .groups = cnl_community1_groups, @@ -130,7 +130,7 @@ .gpi_nmi_en_reg_0 = GPI_NMI_EN_0, .max_pads_per_group = GPIO_MAX_NUM_PER_GROUP, .name = "GPD", - .acpi_path = "\_SB.PCI0.GPIO", + .acpi_path = "\_SB.GPIO", .reset_map = rst_map, .num_reset_vals = ARRAY_SIZE(rst_map), .groups = cnl_community2_groups, @@ -154,7 +154,7 @@ .gpi_nmi_en_reg_0 = GPI_NMI_EN_0, .max_pads_per_group = GPIO_MAX_NUM_PER_GROUP, .name = "GP_AC", - .acpi_path = "\_SB.PCI0.GPIO", + .acpi_path = "\_SB.GPIO", .reset_map = rst_map, .num_reset_vals = ARRAY_SIZE(rst_map), .groups = cnl_community3_groups, @@ -178,7 +178,7 @@ .gpi_nmi_en_reg_0 = GPI_NMI_EN_0, .max_pads_per_group = GPIO_MAX_NUM_PER_GROUP, .name = "GPP_CEJ", - .acpi_path = "\_SB.PCI0.GPIO", + .acpi_path = "\_SB.GPIO", .reset_map = rst_map, .num_reset_vals = ARRAY_SIZE(rst_map), .groups = cnl_community4_groups, diff --git a/src/soc/intel/cannonlake/gpio_cnp_h.c b/src/soc/intel/cannonlake/gpio_cnp_h.c index 4189ebf..8a5e04f 100644 --- a/src/soc/intel/cannonlake/gpio_cnp_h.c +++ b/src/soc/intel/cannonlake/gpio_cnp_h.c @@ -82,7 +82,7 @@ .gpi_nmi_en_reg_0 = GPI_NMI_EN_0, .max_pads_per_group = GPIO_MAX_NUM_PER_GROUP, .name = "GPP_AB", - .acpi_path = "\_SB.PCI0.GPIO", + .acpi_path = "\_SB.GPIO", .reset_map = rst_map, .num_reset_vals = ARRAY_SIZE(rst_map), .groups = cnl_community0_groups, @@ -104,7 +104,7 @@ .gpi_nmi_en_reg_0 = GPI_NMI_EN_0, .max_pads_per_group = GPIO_MAX_NUM_PER_GROUP, .name = "GPP_CDG", - .acpi_path = "\_SB.PCI0.GPIO", + .acpi_path = "\_SB.GPIO", .reset_map = rst_map, .num_reset_vals = ARRAY_SIZE(rst_map), .groups = cnl_community1_groups, @@ -126,7 +126,7 @@ .gpi_nmi_en_reg_0 = GPI_NMI_EN_0, .max_pads_per_group = GPIO_MAX_NUM_PER_GROUP, .name = "GPD", - .acpi_path = "\_SB.PCI0.GPIO", + .acpi_path = "\_SB.GPIO", .reset_map = rst_map_gpd, .num_reset_vals = ARRAY_SIZE(rst_map_gpd), .groups = cnl_community2_groups, @@ -148,7 +148,7 @@ .gpi_nmi_en_reg_0 = GPI_NMI_EN_0, .max_pads_per_group = GPIO_MAX_NUM_PER_GROUP, .name = "GPP_KHEF", - .acpi_path = "\_SB.PCI0.GPIO", + .acpi_path = "\_SB.GPIO", .reset_map = rst_map, .num_reset_vals = ARRAY_SIZE(rst_map), .groups = cnl_community3_groups, @@ -170,7 +170,7 @@ .gpi_nmi_en_reg_0 = GPI_NMI_EN_0, .max_pads_per_group = GPIO_MAX_NUM_PER_GROUP, .name = "GPP_IJ", - .acpi_path = "\_SB.PCI0.GPIO", + .acpi_path = "\_SB.GPIO", .reset_map = rst_map, .num_reset_vals = ARRAY_SIZE(rst_map), .groups = cnl_community4_groups, diff --git a/src/soc/intel/common/block/acpi/acpi/northbridge.asl b/src/soc/intel/common/block/acpi/acpi/northbridge.asl index f352f4e9..aba4862 100644 --- a/src/soc/intel/common/block/acpi/acpi/northbridge.asl +++ b/src/soc/intel/common/block/acpi/acpi/northbridge.asl @@ -210,7 +210,7 @@ }
/* Concatenate the SBREG BAR or PCH_RESERVED resource with GPIO holes */ - ConcatenateResTemplate (MCRS, _SB.PCI0.GPIO.SBRS(), Local0) + ConcatenateResTemplate (MCRS, _SB.GPIO.SBRS(), Local0)
Return (Local0) } diff --git a/src/soc/intel/elkhartlake/acpi/gpio.asl b/src/soc/intel/elkhartlake/acpi/gpio.asl index f89fa17..4626b64 100644 --- a/src/soc/intel/elkhartlake/acpi/gpio.asl +++ b/src/soc/intel/elkhartlake/acpi/gpio.asl @@ -6,104 +6,107 @@ #include <soc/irq.h> #include <soc/pcr_ids.h>
-Device (GPIO) +Scope (_SB) { - Name (_HID, CROS_GPIO_NAME) - Name (_UID, 0) - Name (_DDN, "GPIO Controller") - - Name (RBUF, ResourceTemplate() + Device (GPIO) { - Memory32Fixed (ReadWrite, 0, 0, COM0) - Memory32Fixed (ReadWrite, 0, 0, COM1) - Memory32Fixed (ReadWrite, 0, 0, COM2) - Memory32Fixed (ReadWrite, 0, 0, COM3) - Memory32Fixed (ReadWrite, 0, 0, COM4) - Memory32Fixed (ReadWrite, 0, 0, COM5) - Interrupt (ResourceConsumer, Level, ActiveLow, Shared,,, GIRQ) - { GPIO_IRQ14 } - }) + Name (_HID, CROS_GPIO_NAME) + Name (_UID, 0) + Name (_DDN, "GPIO Controller")
- Method (_CRS, 0, NotSerialized) - { - /* GPIO Community 0 */ - CreateDWordField (^RBUF, ^COM0._BAS, BAS0) - CreateDWordField (^RBUF, ^COM0._LEN, LEN0) - BAS0 = ^^PCRB (PID_GPIOCOM0) - LEN0 = GPIO_BASE_SIZE + Name (RBUF, ResourceTemplate() + { + Memory32Fixed (ReadWrite, 0, 0, COM0) + Memory32Fixed (ReadWrite, 0, 0, COM1) + Memory32Fixed (ReadWrite, 0, 0, COM2) + Memory32Fixed (ReadWrite, 0, 0, COM3) + Memory32Fixed (ReadWrite, 0, 0, COM4) + Memory32Fixed (ReadWrite, 0, 0, COM5) + Interrupt (ResourceConsumer, Level, ActiveLow, Shared,,, GIRQ) + { GPIO_IRQ14 } + })
- /* GPIO Community 1 */ - CreateDWordField (^RBUF, ^COM1._BAS, BAS1) - CreateDWordField (^RBUF, ^COM1._LEN, LEN1) - BAS1 = ^^PCRB (PID_GPIOCOM1) - LEN1 = GPIO_BASE_SIZE + Method (_CRS, 0, NotSerialized) + { + /* GPIO Community 0 */ + CreateDWordField (^RBUF, ^COM0._BAS, BAS0) + CreateDWordField (^RBUF, ^COM0._LEN, LEN0) + BAS0 = ^^PCI0.PCRB (PID_GPIOCOM0) + LEN0 = GPIO_BASE_SIZE
- /* GPIO Community 2 */ - CreateDWordField (^RBUF, ^COM2._BAS, BAS2) - CreateDWordField (^RBUF, ^COM2._LEN, LEN2) - BAS2 = ^^PCRB (PID_GPIOCOM2) - LEN2 = GPIO_BASE_SIZE + /* GPIO Community 1 */ + CreateDWordField (^RBUF, ^COM1._BAS, BAS1) + CreateDWordField (^RBUF, ^COM1._LEN, LEN1) + BAS1 = ^^PCI0.PCRB (PID_GPIOCOM1) + LEN1 = GPIO_BASE_SIZE
- /* GPIO Community 3 */ - CreateDWordField (^RBUF, ^COM3._BAS, BAS3) - CreateDWordField (^RBUF, ^COM3._LEN, LEN3) - BAS3 = ^^PCRB (PID_GPIOCOM3) - LEN3 = GPIO_BASE_SIZE + /* GPIO Community 2 */ + CreateDWordField (^RBUF, ^COM2._BAS, BAS2) + CreateDWordField (^RBUF, ^COM2._LEN, LEN2) + BAS2 = ^^PCI0.PCRB (PID_GPIOCOM2) + LEN2 = GPIO_BASE_SIZE
- /* GPIO Community 4 */ - CreateDWordField (^RBUF, ^COM4._BAS, BAS4) - CreateDWordField (^RBUF, ^COM4._LEN, LEN4) - BAS4 = ^^PCRB (PID_GPIOCOM4) - LEN4 = GPIO_BASE_SIZE + /* GPIO Community 3 */ + CreateDWordField (^RBUF, ^COM3._BAS, BAS3) + CreateDWordField (^RBUF, ^COM3._LEN, LEN3) + BAS3 = ^^PCI0.PCRB (PID_GPIOCOM3) + LEN3 = GPIO_BASE_SIZE
- /* GPIO Community 5 */ - CreateDWordField (^RBUF, ^COM5._BAS, BAS5) - CreateDWordField (^RBUF, ^COM5._LEN, LEN5) - BAS5 = ^^PCRB (PID_GPIOCOM5) - LEN5 = GPIO_BASE_SIZE + /* GPIO Community 4 */ + CreateDWordField (^RBUF, ^COM4._BAS, BAS4) + CreateDWordField (^RBUF, ^COM4._LEN, LEN4) + BAS4 = ^^PCI0.PCRB (PID_GPIOCOM4) + LEN4 = GPIO_BASE_SIZE
- Return (RBUF) - } + /* GPIO Community 5 */ + CreateDWordField (^RBUF, ^COM5._BAS, BAS5) + CreateDWordField (^RBUF, ^COM5._LEN, LEN5) + BAS5 = ^^PCI0.PCRB (PID_GPIOCOM5) + LEN5 = GPIO_BASE_SIZE
- Name (SBRT, ResourceTemplate() - { - /* PCH reserved resource split into 2 with GPIO hole */ - DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, - Cacheable, ReadWrite, - 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00000000,,, SBR1) + Return (RBUF) + }
- DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, - Cacheable, ReadWrite, - 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00000000,,, SBR2) - }) + Name (SBRT, ResourceTemplate() + { + /* PCH reserved resource split into 2 with GPIO hole */ + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, + Cacheable, ReadWrite, + 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000,,, SBR1)
- Method (SBRS, 0, NotSerialized) - { - CreateDwordField (^SBRT, ^SBR1._MIN, MIN1) - CreateDwordField (^SBRT, ^SBR1._MAX, MAX1) - CreateDwordField (^SBRT, ^SBR1._LEN, LEN1) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, + Cacheable, ReadWrite, + 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000,,, SBR2) + })
- /* Starting with the last community which have the lowest PID */ - MIN1 = PCH_PRESERVED_BASE_ADDRESS - MAX1 = ^^PCRB (PID_GPIOCOM5) - 1 - LEN1 = MAX1 - MIN1 + 1 + Method (SBRS, 0, NotSerialized) + { + CreateDwordField (^SBRT, ^SBR1._MIN, MIN1) + CreateDwordField (^SBRT, ^SBR1._MAX, MAX1) + CreateDwordField (^SBRT, ^SBR1._LEN, LEN1)
- CreateDwordField (^SBRT, ^SBR2._MIN, MIN2) - CreateDwordField (^SBRT, ^SBR2._MAX, MAX2) - CreateDwordField (^SBRT, ^SBR2._LEN, LEN2) + /* Starting with the last community which have the lowest PID */ + MIN1 = PCH_PRESERVED_BASE_ADDRESS + MAX1 = ^^PCI0.PCRB (PID_GPIOCOM5) - 1 + LEN1 = MAX1 - MIN1 + 1
- MIN2 = ^^PCRB (PID_GPIOCOM0) + GPIO_BASE_SIZE - MAX2 = PCH_PRESERVED_BASE_ADDRESS + PCH_PRESERVED_BASE_SIZE - 1 - LEN2 = MAX2 - MIN2 + 1 + CreateDwordField (^SBRT, ^SBR2._MIN, MIN2) + CreateDwordField (^SBRT, ^SBR2._MAX, MAX2) + CreateDwordField (^SBRT, ^SBR2._LEN, LEN2)
- Return (SBRT) - } + MIN2 = ^^PCI0.PCRB (PID_GPIOCOM0) + GPIO_BASE_SIZE + MAX2 = PCH_PRESERVED_BASE_ADDRESS + PCH_PRESERVED_BASE_SIZE - 1 + LEN2 = MAX2 - MIN2 + 1
- Method (_STA, 0, NotSerialized) - { - Return (0xF) + Return (SBRT) + } + + Method (_STA, 0, NotSerialized) + { + Return (0xF) + } } } /* diff --git a/src/soc/intel/elkhartlake/gpio.c b/src/soc/intel/elkhartlake/gpio.c index 1b07bc5..dcd93a0 100644 --- a/src/soc/intel/elkhartlake/gpio.c +++ b/src/soc/intel/elkhartlake/gpio.c @@ -87,7 +87,7 @@ .gpi_nmi_en_reg_0 = GPI_NMI_EN_0, .max_pads_per_group = GPIO_MAX_NUM_PER_GROUP, .name = "GPP_BTG", - .acpi_path = "\_SB.PCI0.GPIO", + .acpi_path = "\_SB.GPIO", .reset_map = rst_map, .num_reset_vals = ARRAY_SIZE(rst_map), .groups = ehl_community0_groups, @@ -109,7 +109,7 @@ .gpi_nmi_en_reg_0 = GPI_NMI_EN_0, .max_pads_per_group = GPIO_MAX_NUM_PER_GROUP, .name = "GPP_VHDU", - .acpi_path = "\_SB.PCI0.GPIO", + .acpi_path = "\_SB.GPIO", .reset_map = rst_map, .num_reset_vals = ARRAY_SIZE(rst_map), .groups = ehl_community1_groups, @@ -129,7 +129,7 @@ .gpi_smi_en_reg_0 = GPI_SMI_EN_0, .max_pads_per_group = GPIO_MAX_NUM_PER_GROUP, .name = "GPD", - .acpi_path = "\_SB.PCI0.GPIO", + .acpi_path = "\_SB.GPIO", .reset_map = rst_map_gpd, .num_reset_vals = ARRAY_SIZE(rst_map_gpd), .groups = ehl_community2_groups, @@ -151,7 +151,7 @@ .gpi_nmi_en_reg_0 = GPI_NMI_EN_0, .max_pads_per_group = GPIO_MAX_NUM_PER_GROUP, .name = "GPP_SA", - .acpi_path = "\_SB.PCI0.GPIO", + .acpi_path = "\_SB.GPIO", .reset_map = rst_map, .num_reset_vals = ARRAY_SIZE(rst_map), .groups = ehl_community3_groups, @@ -173,7 +173,7 @@ .gpi_nmi_en_reg_0 = GPI_NMI_EN_0, .max_pads_per_group = GPIO_MAX_NUM_PER_GROUP, .name = "GPP_CFE", - .acpi_path = "\_SB.PCI0.GPIO", + .acpi_path = "\_SB.GPIO", .reset_map = rst_map, .num_reset_vals = ARRAY_SIZE(rst_map), .groups = ehl_community4_groups, @@ -195,7 +195,7 @@ .gpi_nmi_en_reg_0 = GPI_NMI_EN_0, .max_pads_per_group = GPIO_MAX_NUM_PER_GROUP, .name = "GPP_RR", - .acpi_path = "\_SB.PCI0.GPIO", + .acpi_path = "\_SB.GPIO", .reset_map = rst_map, .num_reset_vals = ARRAY_SIZE(rst_map), .groups = ehl_community5_groups, diff --git a/src/soc/intel/jasperlake/acpi/gpio.asl b/src/soc/intel/jasperlake/acpi/gpio.asl index 012cbfa..3a48126 100644 --- a/src/soc/intel/jasperlake/acpi/gpio.asl +++ b/src/soc/intel/jasperlake/acpi/gpio.asl @@ -7,103 +7,106 @@
#include <soc/intel/common/acpi/gpio.asl>
-Device (GPIO) +Scope (_SB) { - Name (_HID, CROS_GPIO_NAME) - Name (_UID, 0) - Name (_DDN, "GPIO Controller") - - Name (RBUF, ResourceTemplate() + Device (GPIO) { - Memory32Fixed (ReadWrite, 0, 0, COM0) - Memory32Fixed (ReadWrite, 0, 0, COM1) - Memory32Fixed (ReadWrite, 0, 0, COM4) - Memory32Fixed (ReadWrite, 0, 0, COM5) - Interrupt (ResourceConsumer, Level, ActiveLow, Shared,,, GIRQ) - { GPIO_IRQ14 } - }) + Name (_HID, CROS_GPIO_NAME) + Name (_UID, 0) + Name (_DDN, "GPIO Controller")
- Method (_CRS, 0, NotSerialized) - { - /* GPIO Community 0 */ - CreateDWordField (^RBUF, ^COM0._BAS, BAS0) - CreateDWordField (^RBUF, ^COM0._LEN, LEN0) - BAS0 = ^^PCRB (PID_GPIOCOM0) - LEN0 = GPIO_BASE_SIZE + Name (RBUF, ResourceTemplate() + { + Memory32Fixed (ReadWrite, 0, 0, COM0) + Memory32Fixed (ReadWrite, 0, 0, COM1) + Memory32Fixed (ReadWrite, 0, 0, COM4) + Memory32Fixed (ReadWrite, 0, 0, COM5) + Interrupt (ResourceConsumer, Level, ActiveLow, Shared,,, GIRQ) + { GPIO_IRQ14 } + })
- /* GPIO Community 1 */ - CreateDWordField (^RBUF, ^COM1._BAS, BAS1) - CreateDWordField (^RBUF, ^COM1._LEN, LEN1) - BAS1 = ^^PCRB (PID_GPIOCOM1) - LEN1 = GPIO_BASE_SIZE + Method (_CRS, 0, NotSerialized) + { + /* GPIO Community 0 */ + CreateDWordField (^RBUF, ^COM0._BAS, BAS0) + CreateDWordField (^RBUF, ^COM0._LEN, LEN0) + BAS0 = ^^PCI0.PCRB (PID_GPIOCOM0) + LEN0 = GPIO_BASE_SIZE
- /* GPIO Community 4 */ - CreateDWordField (^RBUF, ^COM4._BAS, BAS4) - CreateDWordField (^RBUF, ^COM4._LEN, LEN4) - BAS4 = ^^PCRB (PID_GPIOCOM4) - LEN4 = GPIO_BASE_SIZE + /* GPIO Community 1 */ + CreateDWordField (^RBUF, ^COM1._BAS, BAS1) + CreateDWordField (^RBUF, ^COM1._LEN, LEN1) + BAS1 = ^^PCI0.PCRB (PID_GPIOCOM1) + LEN1 = GPIO_BASE_SIZE
- /* GPIO Community 5 */ - CreateDWordField (^RBUF, ^COM5._BAS, BAS5) - CreateDWordField (^RBUF, ^COM5._LEN, LEN5) - BAS5 = ^^PCRB (PID_GPIOCOM5) - LEN5 = GPIO_BASE_SIZE + /* GPIO Community 4 */ + CreateDWordField (^RBUF, ^COM4._BAS, BAS4) + CreateDWordField (^RBUF, ^COM4._LEN, LEN4) + BAS4 = ^^PCI0.PCRB (PID_GPIOCOM4) + LEN4 = GPIO_BASE_SIZE
- Return (RBUF) - } + /* GPIO Community 5 */ + CreateDWordField (^RBUF, ^COM5._BAS, BAS5) + CreateDWordField (^RBUF, ^COM5._LEN, LEN5) + BAS5 = ^^PCI0.PCRB (PID_GPIOCOM5) + LEN5 = GPIO_BASE_SIZE
- Name (SBRT, ResourceTemplate() - { - /* PCH reserved resource split into 3 with GPIO holes */ - DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, - Cacheable, ReadWrite, - 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00000000,,, SBR1) + Return (RBUF) + }
- DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, - Cacheable, ReadWrite, - 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00000000,,, SBR2) + Name (SBRT, ResourceTemplate() + { + /* PCH reserved resource split into 3 with GPIO holes */ + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, + Cacheable, ReadWrite, + 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000,,, SBR1)
- DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, - Cacheable, ReadWrite, - 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00000000,,, SBR3) - }) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, + Cacheable, ReadWrite, + 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000,,, SBR2)
- Method (SBRS, 0, NotSerialized) - { - CreateDwordField (^SBRT, ^SBR1._MIN, MIN1) - CreateDwordField (^SBRT, ^SBR1._MAX, MAX1) - CreateDwordField (^SBRT, ^SBR1._LEN, LEN1) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, + Cacheable, ReadWrite, + 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000,,, SBR3) + })
- /* Starting with the last community which have the lowest PID */ - MIN1 = PCH_PRESERVED_BASE_ADDRESS - MAX1 = ^^PCRB (PID_GPIOCOM5) - 1 - LEN1 = MAX1 - MIN1 + 1 + Method (SBRS, 0, NotSerialized) + { + CreateDwordField (^SBRT, ^SBR1._MIN, MIN1) + CreateDwordField (^SBRT, ^SBR1._MAX, MAX1) + CreateDwordField (^SBRT, ^SBR1._LEN, LEN1)
- CreateDwordField (^SBRT, ^SBR2._MIN, MIN2) - CreateDwordField (^SBRT, ^SBR2._MAX, MAX2) - CreateDwordField (^SBRT, ^SBR2._LEN, LEN2) + /* Starting with the last community which have the lowest PID */ + MIN1 = PCH_PRESERVED_BASE_ADDRESS + MAX1 = ^^PCI0.PCRB (PID_GPIOCOM5) - 1 + LEN1 = MAX1 - MIN1 + 1
- MIN2 = ^^PCRB (PID_GPIOCOM4) + GPIO_BASE_SIZE - MAX2 = ^^PCRB (PID_GPIOCOM1) - 1 - LEN2 = MAX2 - MIN2 + 1 + CreateDwordField (^SBRT, ^SBR2._MIN, MIN2) + CreateDwordField (^SBRT, ^SBR2._MAX, MAX2) + CreateDwordField (^SBRT, ^SBR2._LEN, LEN2)
- CreateDwordField (^SBRT, ^SBR3._MIN, MIN3) - CreateDwordField (^SBRT, ^SBR3._MAX, MAX3) - CreateDwordField (^SBRT, ^SBR3._LEN, LEN3) + MIN2 = ^^PCI0.PCRB (PID_GPIOCOM4) + GPIO_BASE_SIZE + MAX2 = ^^PCI0.PCRB (PID_GPIOCOM1) - 1 + LEN2 = MAX2 - MIN2 + 1
- MIN3 = ^^PCRB (PID_GPIOCOM0) + GPIO_BASE_SIZE - MAX3 = PCH_PRESERVED_BASE_ADDRESS + PCH_PRESERVED_BASE_SIZE - 1 - LEN3 = MAX3 - MIN3 + 1 + CreateDwordField (^SBRT, ^SBR3._MIN, MIN3) + CreateDwordField (^SBRT, ^SBR3._MAX, MAX3) + CreateDwordField (^SBRT, ^SBR3._LEN, LEN3)
- Return (SBRT) - } + MIN3 = ^^PCI0.PCRB (PID_GPIOCOM0) + GPIO_BASE_SIZE + MAX3 = PCH_PRESERVED_BASE_ADDRESS + PCH_PRESERVED_BASE_SIZE - 1 + LEN3 = MAX3 - MIN3 + 1
- Method (_STA, 0, NotSerialized) - { - Return (0xF) + Return (SBRT) + } + + Method (_STA, 0, NotSerialized) + { + Return (0xF) + } } } /* diff --git a/src/soc/intel/jasperlake/gpio.c b/src/soc/intel/jasperlake/gpio.c index 42eb183..c8c4c4a 100644 --- a/src/soc/intel/jasperlake/gpio.c +++ b/src/soc/intel/jasperlake/gpio.c @@ -80,7 +80,7 @@ .gpi_nmi_en_reg_0 = GPI_NMI_EN_0, .max_pads_per_group = GPIO_MAX_NUM_PER_GROUP, .name = "GPP_FBASR", - .acpi_path = "\_SB.PCI0.GPIO", + .acpi_path = "\_SB.GPIO", .reset_map = rst_map_com0, .num_reset_vals = ARRAY_SIZE(rst_map_com0), .groups = jsl_community0_groups, @@ -102,7 +102,7 @@ .gpi_nmi_en_reg_0 = GPI_NMI_EN_0, .max_pads_per_group = GPIO_MAX_NUM_PER_GROUP, .name = "GPP_HDC", - .acpi_path = "\_SB.PCI0.GPIO", + .acpi_path = "\_SB.GPIO", .reset_map = rst_map, .num_reset_vals = ARRAY_SIZE(rst_map), .groups = jsl_community1_groups, @@ -122,7 +122,7 @@ .gpi_smi_en_reg_0 = GPI_SMI_EN_0, .max_pads_per_group = GPIO_MAX_NUM_PER_GROUP, .name = "GPD", - .acpi_path = "\_SB.PCI0.GPIO", + .acpi_path = "\_SB.GPIO", .reset_map = rst_map, .num_reset_vals = ARRAY_SIZE(rst_map), .groups = jsl_community2_groups, @@ -144,7 +144,7 @@ .gpi_nmi_en_reg_0 = GPI_NMI_EN_0, .max_pads_per_group = GPIO_MAX_NUM_PER_GROUP, .name = "GPP_E", - .acpi_path = "\_SB.PCI0.GPIO", + .acpi_path = "\_SB.GPIO", .reset_map = rst_map, .num_reset_vals = ARRAY_SIZE(rst_map), .groups = jsl_community4_groups, @@ -166,7 +166,7 @@ .gpi_nmi_en_reg_0 = GPI_NMI_EN_0, .max_pads_per_group = GPIO_MAX_NUM_PER_GROUP, .name = "GPP_G", - .acpi_path = "\_SB.PCI0.GPIO", + .acpi_path = "\_SB.GPIO", .reset_map = rst_map, .num_reset_vals = ARRAY_SIZE(rst_map), .groups = jsl_community5_groups, diff --git a/src/soc/intel/meteorlake/acpi/gpio.asl b/src/soc/intel/meteorlake/acpi/gpio.asl index 39eec05..1e8303c 100644 --- a/src/soc/intel/meteorlake/acpi/gpio.asl +++ b/src/soc/intel/meteorlake/acpi/gpio.asl @@ -5,109 +5,112 @@ #include <soc/irq.h> #include <soc/pcr_ids.h>
-Device (GPIO) +Scope (_SB) { - Name (_HID, CROS_GPIO_NAME) - Name (_UID, 0) - Name (_DDN, "GPIO Controller") - - Name (RBUF, ResourceTemplate() + Device (GPIO) { - Memory32Fixed (ReadWrite, 0, 0, COM0) - Memory32Fixed (ReadWrite, 0, 0, COM1) - Memory32Fixed (ReadWrite, 0, 0, COM3) - Memory32Fixed (ReadWrite, 0, 0, COM4) - Memory32Fixed (ReadWrite, 0, 0, COM5) - Interrupt (ResourceConsumer, Level, ActiveLow, Shared,,, GIRQ) - { GPIO_IRQ14 } - }) - Method (_CRS, 0, NotSerialized) - { - /* GPIO Community 0 */ - CreateDWordField (^RBUF, ^COM0._BAS, BAS0) - CreateDWordField (^RBUF, ^COM0._LEN, LEN0) - BAS0 = ^^PCRB (PID_GPIOCOM0) - LEN0 = GPIO_BASE_SIZE + Name (_HID, CROS_GPIO_NAME) + Name (_UID, 0) + Name (_DDN, "GPIO Controller")
- /* GPIO Community 1 */ - CreateDWordField (^RBUF, ^COM1._BAS, BAS1) - CreateDWordField (^RBUF, ^COM1._LEN, LEN1) - BAS1 = ^^PCRB (PID_GPIOCOM1) - LEN1 = GPIO_BASE_SIZE + Name (RBUF, ResourceTemplate() + { + Memory32Fixed (ReadWrite, 0, 0, COM0) + Memory32Fixed (ReadWrite, 0, 0, COM1) + Memory32Fixed (ReadWrite, 0, 0, COM3) + Memory32Fixed (ReadWrite, 0, 0, COM4) + Memory32Fixed (ReadWrite, 0, 0, COM5) + Interrupt (ResourceConsumer, Level, ActiveLow, Shared,,, GIRQ) + { GPIO_IRQ14 } + }) + Method (_CRS, 0, NotSerialized) + { + /* GPIO Community 0 */ + CreateDWordField (^RBUF, ^COM0._BAS, BAS0) + CreateDWordField (^RBUF, ^COM0._LEN, LEN0) + BAS0 = ^^PCI0.PCRB (PID_GPIOCOM0) + LEN0 = GPIO_BASE_SIZE
- /* GPIO Community 3 */ - CreateDWordField (^RBUF, ^COM3._BAS, BAS3) - CreateDWordField (^RBUF, ^COM3._LEN, LEN3) - BAS3 = ^^PCRB (PID_GPIOCOM3) - LEN3 = GPIO_BASE_SIZE + /* GPIO Community 1 */ + CreateDWordField (^RBUF, ^COM1._BAS, BAS1) + CreateDWordField (^RBUF, ^COM1._LEN, LEN1) + BAS1 = ^^PCI0.PCRB (PID_BmGetNextLoadOptionBufferGPIOCOM1) + LEN1 = GPIO_BASE_SIZE
- /* GPIO Community 4 */ - CreateDWordField (^RBUF, ^COM4._BAS, BAS4) - CreateDWordField (^RBUF, ^COM4._LEN, LEN4) - BAS4 = ^^PCRB (PID_GPIOCOM4) - LEN4 = GPIO_BASE_SIZE + /* GPIO Community 3 */ + CreateDWordField (^RBUF, ^COM3._BAS, BAS3) + CreateDWordField (^RBUF, ^COM3._LEN, LEN3) + BAS3 = ^^PCI0.PCRB (PID_GPIOCOM3) + LEN3 = GPIO_BASE_SIZE
- /* GPIO Community 5 */ - CreateDWordField (^RBUF, ^COM5._BAS, BAS5) - CreateDWordField (^RBUF, ^COM5._LEN, LEN5) - BAS5 = ^^PCRB (PID_GPIOCOM5) - LEN5 = GPIO_BASE_SIZE + /* GPIO Community 4 */ + CreateDWordField (^RBUF, ^COM4._BAS, BAS4) + CreateDWordField (^RBUF, ^COM4._LEN, LEN4) + BAS4 = ^^PCI0.PCRB (PID_GPIOCOM4) + LEN4 = GPIO_BASE_SIZE
- Return (RBUF) - } + /* GPIO Community 5 */ + CreateDWordField (^RBUF, ^COM5._BAS, BAS5) + CreateDWordField (^RBUF, ^COM5._LEN, LEN5) + BAS5 = ^^PCI0.PCRB (PID_GPIOCOM5) + LEN5 = GPIO_BASE_SIZE
- Name (SBRT, ResourceTemplate() - { - /* SBREG BAR reserved resource split into 3 with GPIO holes */ - DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, - Cacheable, ReadWrite, - 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00000000,,, SBR1) + Return (RBUF) + }
- DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, - Cacheable, ReadWrite, - 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00000000,,, SBR2) + Name (SBRT, ResourceTemplate() + { + /* SBREG BAR reserved resource split into 3 with GPIO holes */ + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, + Cacheable, ReadWrite, + 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000,,, SBR1)
- DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, - Cacheable, ReadWrite, - 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00000000,,, SBR3) - }) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, + Cacheable, ReadWrite, + 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000,,, SBR2)
- Method (SBRS, 0, NotSerialized) - { - CreateDwordField (^SBRT, ^SBR1._MIN, MIN1) - CreateDwordField (^SBRT, ^SBR1._MAX, MAX1) - CreateDwordField (^SBRT, ^SBR1._LEN, LEN1) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, + Cacheable, ReadWrite, + 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000,,, SBR3) + })
- /* Starting with the last community which have the lowest PID */ - MIN1 = P2SB_BAR - MAX1 = ^^PCRB (PID_GPIOCOM5) - 1 - LEN1 = MAX1 - MIN1 + 1 + Method (SBRS, 0, NotSerialized) + { + CreateDwordField (^SBRT, ^SBR1._MIN, MIN1) + CreateDwordField (^SBRT, ^SBR1._MAX, MAX1) + CreateDwordField (^SBRT, ^SBR1._LEN, LEN1)
- CreateDwordField (^SBRT, ^SBR2._MIN, MIN2) - CreateDwordField (^SBRT, ^SBR2._MAX, MAX2) - CreateDwordField (^SBRT, ^SBR2._LEN, LEN2) + /* Starting with the last community which have the lowest PID */ + MIN1 = P2SB_BAR + MAX1 = ^^PCI0.PCRB (PID_GPIOCOM5) - 1 + LEN1 = MAX1 - MIN1 + 1
- MIN2 = ^^PCRB (PID_GPIOCOM3) + GPIO_BASE_SIZE - MAX2 = ^^PCRB (PID_GPIOCOM1) - 1 - LEN2 = MAX2 - MIN2 + 1 + CreateDwordField (^SBRT, ^SBR2._MIN, MIN2) + CreateDwordField (^SBRT, ^SBR2._MAX, MAX2) + CreateDwordField (^SBRT, ^SBR2._LEN, LEN2)
- CreateDwordField (^SBRT, ^SBR3._MIN, MIN3) - CreateDwordField (^SBRT, ^SBR3._MAX, MAX3) - CreateDwordField (^SBRT, ^SBR3._LEN, LEN3) + MIN2 = ^^PCI0.PCRB (PID_GPIOCOM3) + GPIO_BASE_SIZE + MAX2 = ^^PCI0.PCRB (PID_GPIOCOM1) - 1 + LEN2 = MAX2 - MIN2 + 1
- MIN3 = ^^PCRB (PID_GPIOCOM0) + GPIO_BASE_SIZE - MAX3 = P2SB_BAR + P2SB_SIZE - 1 - LEN3 = MAX3 - MIN3 + 1 + CreateDwordField (^SBRT, ^SBR3._MIN, MIN3) + CreateDwordField (^SBRT, ^SBR3._MAX, MAX3) + CreateDwordField (^SBRT, ^SBR3._LEN, LEN3)
- Return (SBRT) - } + MIN3 = ^^PCI0.PCRB (PID_GPIOCOM0) + GPIO_BASE_SIZE + MAX3 = P2SB_BAR + P2SB_SIZE - 1 + LEN3 = MAX3 - MIN3 + 1
- Method (_STA, 0, NotSerialized) - { - Return (0xF) + Return (SBRT) + } + + Method (_STA, 0, NotSerialized) + { + Return (0xF) + } } }
diff --git a/src/soc/intel/meteorlake/gpio.c b/src/soc/intel/meteorlake/gpio.c index d4cbe0c..cbbc663 100644 --- a/src/soc/intel/meteorlake/gpio.c +++ b/src/soc/intel/meteorlake/gpio.c @@ -92,7 +92,7 @@ .gpi_nmi_en_reg_0 = GPI_NMI_EN_0, .max_pads_per_group = GPIO_MAX_NUM_PER_GROUP, .name = "GPP_CPUVC", - .acpi_path = "\_SB.PCI0.GPIO", + .acpi_path = "\_SB.GPIO", .reset_map = rst_map, .num_reset_vals = ARRAY_SIZE(rst_map), .groups = mtl_community0_groups, @@ -120,7 +120,7 @@ .gpi_nmi_en_reg_0 = GPI_NMI_EN_0, .max_pads_per_group = GPIO_MAX_NUM_PER_GROUP, .name = "GPP_AE", - .acpi_path = "\_SB.PCI0.GPIO", + .acpi_path = "\_SB.GPIO", .reset_map = rst_map, .num_reset_vals = ARRAY_SIZE(rst_map), .groups = mtl_community1_groups, @@ -144,7 +144,7 @@ .gpi_gpe_en_reg_0 = GPI_GPE_EN_0, .max_pads_per_group = GPIO_MAX_NUM_PER_GROUP, .name = "GPP_HFSPI0VG3", - .acpi_path = "\_SB.PCI0.GPIO", + .acpi_path = "\_SB.GPIO", .reset_map = rst_map, .num_reset_vals = ARRAY_SIZE(rst_map), .groups = mtl_community3_groups, @@ -168,7 +168,7 @@ .gpi_gpe_en_reg_0 = GPI_GPE_EN_0, .max_pads_per_group = GPIO_MAX_NUM_PER_GROUP, .name = "GPP_SJTAG", - .acpi_path = "\_SB.PCI0.GPIO", + .acpi_path = "\_SB.GPIO", .reset_map = rst_map, .num_reset_vals = ARRAY_SIZE(rst_map), .groups = mtl_community4_groups, @@ -193,7 +193,7 @@ .gpi_nmi_en_reg_0 = GPI_NMI_EN_0, .max_pads_per_group = GPIO_MAX_NUM_PER_GROUP, .name = "GPP_BDVG", - .acpi_path = "\_SB.PCI0.GPIO", + .acpi_path = "\_SB.GPIO", .reset_map = rst_map, .num_reset_vals = ARRAY_SIZE(rst_map), .groups = mtl_community5_groups, diff --git a/src/soc/intel/tigerlake/acpi/gpio.asl b/src/soc/intel/tigerlake/acpi/gpio.asl index e575eb9..b285632 100644 --- a/src/soc/intel/tigerlake/acpi/gpio.asl +++ b/src/soc/intel/tigerlake/acpi/gpio.asl @@ -5,102 +5,105 @@ #include <soc/irq.h> #include <soc/pcr_ids.h>
-Device (GPIO) +Scope (_SB) { - Name (_HID, "INT34C5") - Name (_UID, 0) - Name (_DDN, "GPIO Controller") - - Name (RBUF, ResourceTemplate() + Device (GPIO) { - Memory32Fixed (ReadWrite, 0, 0, COM0) - Memory32Fixed (ReadWrite, 0, 0, COM1) - Memory32Fixed (ReadWrite, 0, 0, COM4) - Memory32Fixed (ReadWrite, 0, 0, COM5) - Interrupt (ResourceConsumer, Level, ActiveLow, Shared,,, GIRQ) - { GPIO_IRQ14 } - }) - Method (_CRS, 0, NotSerialized) - { - /* GPIO Community 0 */ - CreateDWordField (^RBUF, ^COM0._BAS, BAS0) - CreateDWordField (^RBUF, ^COM0._LEN, LEN0) - BAS0 = ^^PCRB (PID_GPIOCOM0) - LEN0 = GPIO_BASE_SIZE + Name (_HID, "INT34C5") + Name (_UID, 0) + Name (_DDN, "GPIO Controller")
- /* GPIO Community 1 */ - CreateDWordField (^RBUF, ^COM1._BAS, BAS1) - CreateDWordField (^RBUF, ^COM1._LEN, LEN1) - BAS1 = ^^PCRB (PID_GPIOCOM1) - LEN1 = GPIO_BASE_SIZE + Name (RBUF, ResourceTemplate() + { + Memory32Fixed (ReadWrite, 0, 0, COM0) + Memory32Fixed (ReadWrite, 0, 0, COM1) + Memory32Fixed (ReadWrite, 0, 0, COM4) + Memory32Fixed (ReadWrite, 0, 0, COM5) + Interrupt (ResourceConsumer, Level, ActiveLow, Shared,,, GIRQ) + { GPIO_IRQ14 } + }) + Method (_CRS, 0, NotSerialized) + { + /* GPIO Community 0 */ + CreateDWordField (^RBUF, ^COM0._BAS, BAS0) + CreateDWordField (^RBUF, ^COM0._LEN, LEN0) + BAS0 = ^^PCI0.PCRB (PID_GPIOCOM0) + LEN0 = GPIO_BASE_SIZE
- /* GPIO Community 4 */ - CreateDWordField (^RBUF, ^COM4._BAS, BAS4) - CreateDWordField (^RBUF, ^COM4._LEN, LEN4) - BAS4 = ^^PCRB (PID_GPIOCOM4) - LEN4 = GPIO_BASE_SIZE + /* GPIO Community 1 */ + CreateDWordField (^RBUF, ^COM1._BAS, BAS1) + CreateDWordField (^RBUF, ^COM1._LEN, LEN1) + BAS1 = ^^PCI0.PCRB (PID_GPIOCOM1) + LEN1 = GPIO_BASE_SIZE
- /* GPIO Community 5 */ - CreateDWordField (^RBUF, ^COM5._BAS, BAS5) - CreateDWordField (^RBUF, ^COM5._LEN, LEN5) - BAS5 = ^^PCRB (PID_GPIOCOM5) - LEN5 = GPIO_BASE_SIZE + /* GPIO Community 4 */ + CreateDWordField (^RBUF, ^COM4._BAS, BAS4) + CreateDWordField (^RBUF, ^COM4._LEN, LEN4) + BAS4 = ^^PCI0.PCRB (PID_GPIOCOM4) + LEN4 = GPIO_BASE_SIZE
- Return (RBUF) - } + /* GPIO Community 5 */ + CreateDWordField (^RBUF, ^COM5._BAS, BAS5) + CreateDWordField (^RBUF, ^COM5._LEN, LEN5) + BAS5 = ^^PCI0.PCRB (PID_GPIOCOM5) + LEN5 = GPIO_BASE_SIZE
- Name (SBRT, ResourceTemplate() - { - /* PCH reserved resource split into 3 with GPIO holes */ - DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, - Cacheable, ReadWrite, - 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00000000,,, SBR1) + Return (RBUF) + }
- DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, - Cacheable, ReadWrite, - 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00000000,,, SBR2) + Name (SBRT, ResourceTemplate() + { + /* PCH reserved resource split into 3 with GPIO holes */ + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, + Cacheable, ReadWrite, + 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000,,, SBR1)
- DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, - Cacheable, ReadWrite, - 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00000000,,, SBR3) - }) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, + Cacheable, ReadWrite, + 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000,,, SBR2)
- Method (SBRS, 0, NotSerialized) - { - CreateDwordField (^SBRT, ^SBR1._MIN, MIN1) - CreateDwordField (^SBRT, ^SBR1._MAX, MAX1) - CreateDwordField (^SBRT, ^SBR1._LEN, LEN1) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, + Cacheable, ReadWrite, + 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000,,, SBR3) + })
- /* Starting with the last community which have the lowest PID */ - MIN1 = PCH_PRESERVED_BASE_ADDRESS - MAX1 = ^^PCRB (PID_GPIOCOM5) - 1 - LEN1 = MAX1 - MIN1 + 1 + Method (SBRS, 0, NotSerialized) + { + CreateDwordField (^SBRT, ^SBR1._MIN, MIN1) + CreateDwordField (^SBRT, ^SBR1._MAX, MAX1) + CreateDwordField (^SBRT, ^SBR1._LEN, LEN1)
- CreateDwordField (^SBRT, ^SBR2._MIN, MIN2) - CreateDwordField (^SBRT, ^SBR2._MAX, MAX2) - CreateDwordField (^SBRT, ^SBR2._LEN, LEN2) + /* Starting with the last community which have the lowest PID */ + MIN1 = PCH_PRESERVED_BASE_ADDRESS + MAX1 = ^^PCI0.PCRB (PID_GPIOCOM5) - 1 + LEN1 = MAX1 - MIN1 + 1
- MIN2 = ^^PCRB (PID_GPIOCOM4) + GPIO_BASE_SIZE - MAX2 = ^^PCRB (PID_GPIOCOM1) - 1 - LEN2 = MAX2 - MIN2 + 1 + CreateDwordField (^SBRT, ^SBR2._MIN, MIN2) + CreateDwordField (^SBRT, ^SBR2._MAX, MAX2) + CreateDwordField (^SBRT, ^SBR2._LEN, LEN2)
- CreateDwordField (^SBRT, ^SBR3._MIN, MIN3) - CreateDwordField (^SBRT, ^SBR3._MAX, MAX3) - CreateDwordField (^SBRT, ^SBR3._LEN, LEN3) + MIN2 = ^^PCI0.PCRB (PID_GPIOCOM4) + GPIO_BASE_SIZE + MAX2 = ^^PCI0.PCRB (PID_GPIOCOM1) - 1 + LEN2 = MAX2 - MIN2 + 1
- MIN3 = ^^PCRB (PID_GPIOCOM0) + GPIO_BASE_SIZE - MAX3 = PCH_PRESERVED_BASE_ADDRESS + PCH_PRESERVED_BASE_SIZE - 1 - LEN3 = MAX3 - MIN3 + 1 + CreateDwordField (^SBRT, ^SBR3._MIN, MIN3) + CreateDwordField (^SBRT, ^SBR3._MAX, MAX3) + CreateDwordField (^SBRT, ^SBR3._LEN, LEN3)
- Return (SBRT) - } + MIN3 = ^^PCI0.PCRB (PID_GPIOCOM0) + GPIO_BASE_SIZE + MAX3 = PCH_PRESERVED_BASE_ADDRESS + PCH_PRESERVED_BASE_SIZE - 1 + LEN3 = MAX3 - MIN3 + 1
- Method (_STA, 0, NotSerialized) - { - Return (0xF) + Return (SBRT) + } + + Method (_STA, 0, NotSerialized) + { + Return (0xF) + } } }
diff --git a/src/soc/intel/tigerlake/acpi/gpio_pch_h.asl b/src/soc/intel/tigerlake/acpi/gpio_pch_h.asl index 107b700..6b30c2b 100644 --- a/src/soc/intel/tigerlake/acpi/gpio_pch_h.asl +++ b/src/soc/intel/tigerlake/acpi/gpio_pch_h.asl @@ -7,109 +7,112 @@ #include <soc/irq.h> #include <soc/pcr_ids.h>
-Device (GPIO) +Scope (_SB) { - Name (_HID, "INT34C6") - Name (_UID, 0) - Name (_DDN, "GPIO Controller") - - Name (RBUF, ResourceTemplate() + Device (GPIO) { - Memory32Fixed (ReadWrite, 0, 0, COM0) - Memory32Fixed (ReadWrite, 0, 0, COM1) - Memory32Fixed (ReadWrite, 0, 0, COM3) - Memory32Fixed (ReadWrite, 0, 0, COM4) - Memory32Fixed (ReadWrite, 0, 0, COM5) - Interrupt (ResourceConsumer, Level, ActiveLow, Shared,,, GIRQ) - { GPIO_IRQ14 } - }) - Method (_CRS, 0, NotSerialized) - { - /* GPIO Community 0 */ - CreateDWordField (^RBUF, ^COM0._BAS, BAS0) - CreateDWordField (^RBUF, ^COM0._LEN, LEN0) - BAS0 = ^^PCRB (PID_GPIOCOM0) - LEN0 = GPIO_BASE_SIZE + Name (_HID, "INT34C6") + Name (_UID, 0) + Name (_DDN, "GPIO Controller")
- /* GPIO Community 1 */ - CreateDWordField (^RBUF, ^COM1._BAS, BAS1) - CreateDWordField (^RBUF, ^COM1._LEN, LEN1) - BAS1 = ^^PCRB (PID_GPIOCOM1) - LEN1 = GPIO_BASE_SIZE + Name (RBUF, ResourceTemplate() + { + Memory32Fixed (ReadWrite, 0, 0, COM0) + Memory32Fixed (ReadWrite, 0, 0, COM1) + Memory32Fixed (ReadWrite, 0, 0, COM3) + Memory32Fixed (ReadWrite, 0, 0, COM4) + Memory32Fixed (ReadWrite, 0, 0, COM5) + Interrupt (ResourceConsumer, Level, ActiveLow, Shared,,, GIRQ) + { GPIO_IRQ14 } + }) + Method (_CRS, 0, NotSerialized) + { + /* GPIO Community 0 */ + CreateDWordField (^RBUF, ^COM0._BAS, BAS0) + CreateDWordField (^RBUF, ^COM0._LEN, LEN0) + BAS0 = ^^PCI0.PCRB (PID_GPIOCOM0) + LEN0 = GPIO_BASE_SIZE
- /* GPIO Community 3 */ - CreateDWordField (^RBUF, ^COM3._BAS, BAS3) - CreateDWordField (^RBUF, ^COM3._LEN, LEN3) - BAS3 = ^^PCRB (PID_GPIOCOM3) - LEN3 = GPIO_BASE_SIZE + /* GPIO Community 1 */ + CreateDWordField (^RBUF, ^COM1._BAS, BAS1) + CreateDWordField (^RBUF, ^COM1._LEN, LEN1) + BAS1 = ^^PCI0.PCRB (PID_GPIOCOM1) + LEN1 = GPIO_BASE_SIZE
- /* GPIO Community 4 */ - CreateDWordField (^RBUF, ^COM4._BAS, BAS4) - CreateDWordField (^RBUF, ^COM4._LEN, LEN4) - BAS4 = ^^PCRB (PID_GPIOCOM4) - LEN4 = GPIO_BASE_SIZE + /* GPIO Community 3 */ + CreateDWordField (^RBUF, ^COM3._BAS, BAS3) + CreateDWordField (^RBUF, ^COM3._LEN, LEN3) + BAS3 = ^^PCI0.PCRB (PID_GPIOCOM3) + LEN3 = GPIO_BASE_SIZE
- /* GPIO Community 5 */ - CreateDWordField (^RBUF, ^COM5._BAS, BAS5) - CreateDWordField (^RBUF, ^COM5._LEN, LEN5) - BAS5 = ^^PCRB (PID_GPIOCOM5) - LEN5 = GPIO_BASE_SIZE + /* GPIO Community 4 */ + CreateDWordField (^RBUF, ^COM4._BAS, BAS4) + CreateDWordField (^RBUF, ^COM4._LEN, LEN4) + BAS4 = ^^PCI0.PCRB (PID_GPIOCOM4) + LEN4 = GPIO_BASE_SIZE
- Return (RBUF) - } + /* GPIO Community 5 */ + CreateDWordField (^RBUF, ^COM5._BAS, BAS5) + CreateDWordField (^RBUF, ^COM5._LEN, LEN5) + BAS5 = ^^PCI0.PCRB (PID_GPIOCOM5) + LEN5 = GPIO_BASE_SIZE
- Name (SBRT, ResourceTemplate() - { - /* PCH reserved resource split into 3 with GPIO holes */ - DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, - Cacheable, ReadWrite, - 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00000000,,, SBR1) + Return (RBUF) + }
- DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, - Cacheable, ReadWrite, - 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00000000,,, SBR2) + Name (SBRT, ResourceTemplate() + { + /* PCH reserved resource split into 3 with GPIO holes */ + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, + Cacheable, ReadWrite, + 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000,,, SBR1)
- DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, - Cacheable, ReadWrite, - 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00000000,,, SBR3) - }) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, + Cacheable, ReadWrite, + 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000,,, SBR2)
- Method (SBRS, 0, NotSerialized) - { - CreateDwordField (^SBRT, ^SBR1._MIN, MIN1) - CreateDwordField (^SBRT, ^SBR1._MAX, MAX1) - CreateDwordField (^SBRT, ^SBR1._LEN, LEN1) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, + Cacheable, ReadWrite, + 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000,,, SBR3) + })
- /* Starting with the last community which have the lowest PID */ - MIN1 = PCH_PRESERVED_BASE_ADDRESS - MAX1 = ^^PCRB (PID_GPIOCOM5) - 1 - LEN1 = MAX1 - MIN1 + 1 + Method (SBRS, 0, NotSerialized) + { + CreateDwordField (^SBRT, ^SBR1._MIN, MIN1) + CreateDwordField (^SBRT, ^SBR1._MAX, MAX1) + CreateDwordField (^SBRT, ^SBR1._LEN, LEN1)
- CreateDwordField (^SBRT, ^SBR2._MIN, MIN2) - CreateDwordField (^SBRT, ^SBR2._MAX, MAX2) - CreateDwordField (^SBRT, ^SBR2._LEN, LEN2) + /* Starting with the last community which have the lowest PID */ + MIN1 = PCH_PRESERVED_BASE_ADDRESS + MAX1 = ^^PCI0.PCRB (PID_GPIOCOM5) - 1 + LEN1 = MAX1 - MIN1 + 1
- MIN2 = ^^PCRB (PID_GPIOCOM3) + GPIO_BASE_SIZE - MAX2 = ^^PCRB (PID_GPIOCOM1) - 1 - LEN2 = MAX2 - MIN2 + 1 + CreateDwordField (^SBRT, ^SBR2._MIN, MIN2) + CreateDwordField (^SBRT, ^SBR2._MAX, MAX2) + CreateDwordField (^SBRT, ^SBR2._LEN, LEN2)
- CreateDwordField (^SBRT, ^SBR3._MIN, MIN3) - CreateDwordField (^SBRT, ^SBR3._MAX, MAX3) - CreateDwordField (^SBRT, ^SBR3._LEN, LEN3) + MIN2 = ^^PCI0.PCRB (PID_GPIOCOM3) + GPIO_BASE_SIZE + MAX2 = ^^PCI0.PCRB (PID_GPIOCOM1) - 1 + LEN2 = MAX2 - MIN2 + 1
- MIN3 = ^^PCRB (PID_GPIOCOM0) + GPIO_BASE_SIZE - MAX3 = PCH_PRESERVED_BASE_ADDRESS + PCH_PRESERVED_BASE_SIZE - 1 - LEN3 = MAX3 - MIN3 + 1 + CreateDwordField (^SBRT, ^SBR3._MIN, MIN3) + CreateDwordField (^SBRT, ^SBR3._MAX, MAX3) + CreateDwordField (^SBRT, ^SBR3._LEN, LEN3)
- Return (SBRT) - } + MIN3 = ^^PCI0.PCRB (PID_GPIOCOM0) + GPIO_BASE_SIZE + MAX3 = PCH_PRESERVED_BASE_ADDRESS + PCH_PRESERVED_BASE_SIZE - 1 + LEN3 = MAX3 - MIN3 + 1
- Method (_STA, 0, NotSerialized) - { - Return (0xF) + Return (SBRT) + } + + Method (_STA, 0, NotSerialized) + { + Return (0xF) + } } }
diff --git a/src/soc/intel/tigerlake/gpio.c b/src/soc/intel/tigerlake/gpio.c index 7053f3a..6c9eaed 100644 --- a/src/soc/intel/tigerlake/gpio.c +++ b/src/soc/intel/tigerlake/gpio.c @@ -105,7 +105,7 @@ .gpi_nmi_en_reg_0 = GPI_NMI_EN_0, .max_pads_per_group = GPIO_MAX_NUM_PER_GROUP, .name = "GPP_BTA", - .acpi_path = "\_SB.PCI0.GPIO", + .acpi_path = "\_SB.GPIO", .reset_map = rst_map, .num_reset_vals = ARRAY_SIZE(rst_map), .groups = tgl_community0_groups, @@ -132,7 +132,7 @@ .gpi_nmi_en_reg_0 = GPI_NMI_EN_0, .max_pads_per_group = GPIO_MAX_NUM_PER_GROUP, .name = "GPP_SDHU", - .acpi_path = "\_SB.PCI0.GPIO", + .acpi_path = "\_SB.GPIO", .reset_map = rst_map, .num_reset_vals = ARRAY_SIZE(rst_map), .groups = tgl_community1_groups, @@ -158,7 +158,7 @@ .gpi_nmi_en_reg_0 = GPI_NMI_EN_0, .max_pads_per_group = GPIO_MAX_NUM_PER_GROUP, .name = "GPD", - .acpi_path = "\_SB.PCI0.GPIO", + .acpi_path = "\_SB.GPIO", .reset_map = rst_map_com2, .num_reset_vals = ARRAY_SIZE(rst_map_com2), .groups = tgl_community2_groups, @@ -182,7 +182,7 @@ .gpi_nmi_en_reg_0 = GPI_NMI_EN_0, .max_pads_per_group = GPIO_MAX_NUM_PER_GROUP, .name = "GPP_FCE", - .acpi_path = "\_SB.PCI0.GPIO", + .acpi_path = "\_SB.GPIO", .reset_map = rst_map, .num_reset_vals = ARRAY_SIZE(rst_map), .groups = tgl_community4_groups, @@ -209,7 +209,7 @@ .gpi_nmi_en_reg_0 = GPI_NMI_EN_0, .max_pads_per_group = GPIO_MAX_NUM_PER_GROUP, .name = "GPP_CPU_VBPIO", - .acpi_path = "\_SB.PCI0.GPIO", + .acpi_path = "\_SB.GPIO", .reset_map = rst_map, .num_reset_vals = ARRAY_SIZE(rst_map), .groups = tgl_community5_groups, diff --git a/src/soc/intel/tigerlake/gpio_pch_h.c b/src/soc/intel/tigerlake/gpio_pch_h.c index 64662d7..d77499e 100644 --- a/src/soc/intel/tigerlake/gpio_pch_h.c +++ b/src/soc/intel/tigerlake/gpio_pch_h.c @@ -88,7 +88,7 @@ .gpi_nmi_en_reg_0 = GPI_NMI_EN_0, .max_pads_per_group = GPIO_MAX_NUM_PER_GROUP, .name = "GPP_ARB", - .acpi_path = "\_SB.PCI0.GPIO", + .acpi_path = "\_SB.GPIO", .reset_map = rst_map, .num_reset_vals = ARRAY_SIZE(rst_map), .groups = tgl_community0_groups, @@ -109,7 +109,7 @@ .gpi_nmi_en_reg_0 = GPI_NMI_EN_0, .max_pads_per_group = GPIO_MAX_NUM_PER_GROUP, .name = "GPP_DCSG", - .acpi_path = "\_SB.PCI0.GPIO", + .acpi_path = "\_SB.GPIO", .reset_map = rst_map, .num_reset_vals = ARRAY_SIZE(rst_map), .groups = tgl_community1_groups, @@ -128,7 +128,7 @@ .gpi_smi_en_reg_0 = GPI_SMI_EN_0, .max_pads_per_group = GPIO_MAX_NUM_PER_GROUP, .name = "GPD", - .acpi_path = "\_SB.PCI0.GPIO", + .acpi_path = "\_SB.GPIO", .reset_map = rst_map_com2, .num_reset_vals = ARRAY_SIZE(rst_map_com2), .groups = tgl_community2_groups, @@ -149,7 +149,7 @@ .gpi_nmi_en_reg_0 = GPI_NMI_EN_0, .max_pads_per_group = GPIO_MAX_NUM_PER_GROUP, .name = "GPP_EF", - .acpi_path = "\_SB.PCI0.GPIO", + .acpi_path = "\_SB.GPIO", .reset_map = rst_map, .num_reset_vals = ARRAY_SIZE(rst_map), .groups = tgl_community3_groups, @@ -168,7 +168,7 @@ .gpi_smi_en_reg_0 = GPI_SMI_EN_0, .max_pads_per_group = GPIO_MAX_NUM_PER_GROUP, .name = "GPP_HJK", - .acpi_path = "\_SB.PCI0.GPIO", + .acpi_path = "\_SB.GPIO", .reset_map = rst_map, .num_reset_vals = ARRAY_SIZE(rst_map), .groups = tgl_community4_groups, @@ -187,7 +187,7 @@ .gpi_smi_en_reg_0 = GPI_SMI_EN_0, .max_pads_per_group = GPIO_MAX_NUM_PER_GROUP, .name = "GPP_I", - .acpi_path = "\_SB.PCI0.GPIO", + .acpi_path = "\_SB.GPIO", .reset_map = rst_map, .num_reset_vals = ARRAY_SIZE(rst_map), .groups = tgl_community5_groups,
-
Michał Żygowski (Code Review)