HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/40802 )
Change subject: nb/intel/i945/memmap: Convert to 96 characters line length ......................................................................
nb/intel/i945/memmap: Convert to 96 characters line length
Change-Id: I2ef938573e75022dcb31c935dde7d3055e7a53f0 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/northbridge/intel/i945/memmap.c 1 file changed, 3 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/02/40802/1
diff --git a/src/northbridge/intel/i945/memmap.c b/src/northbridge/intel/i945/memmap.c index ee9f100..0183ea2 100644 --- a/src/northbridge/intel/i945/memmap.c +++ b/src/northbridge/intel/i945/memmap.c @@ -65,11 +65,10 @@ return (void *) top_of_ram; }
-/** Decodes used Graphics Mode Select (GMS) to kilobytes. */ +/* Decodes used Graphics Mode Select (GMS) to kilobytes. */ u32 decode_igd_memory_size(const u32 gms) { - static const u16 ggc2uma[] = { 0, 1, 4, 8, 16, 32, - 48, 64 }; + static const u16 ggc2uma[] = { 0, 1, 4, 8, 16, 32, 48, 64 };
if (gms >= ARRAY_SIZE(ggc2uma)) die("Bad Graphics Mode Select (GMS) setting.\n"); @@ -91,9 +90,7 @@ * RAM to cover both cbmem as the TSEG region. */ top_of_ram = (uintptr_t)cbmem_top(); - postcar_frame_add_mtrr(pcf, top_of_ram - 8*MiB, 8*MiB, - MTRR_TYPE_WRBACK); + postcar_frame_add_mtrr(pcf, top_of_ram - 8*MiB, 8*MiB, MTRR_TYPE_WRBACK); postcar_frame_add_mtrr(pcf, northbridge_get_tseg_base(), northbridge_get_tseg_size(), MTRR_TYPE_WRBACK); - }
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40802 )
Change subject: nb/intel/i945/memmap: Convert to 96 characters line length ......................................................................
Patch Set 1: Code-Review+1
(1 comment)
https://review.coreboot.org/c/coreboot/+/40802/1/src/northbridge/intel/i945/... File src/northbridge/intel/i945/memmap.c:
https://review.coreboot.org/c/coreboot/+/40802/1/src/northbridge/intel/i945/... PS1, Line 68: /** That has nothing to do with line length?
HAOUAS Elyes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40802 )
Change subject: nb/intel/i945/memmap: Convert to 96 characters line length ......................................................................
Patch Set 1:
(1 comment)
Thx
https://review.coreboot.org/c/coreboot/+/40802/1/src/northbridge/intel/i945/... File src/northbridge/intel/i945/memmap.c:
https://review.coreboot.org/c/coreboot/+/40802/1/src/northbridge/intel/i945/... PS1, Line 68: /**
That has nothing to do with line length?
Oops :) indeed
Hello build bot (Jenkins), Angel Pons, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/40802
to look at the new patch set (#2).
Change subject: nb/intel/i945/memmap: Convert to 96 characters line length ......................................................................
nb/intel/i945/memmap: Convert to 96 characters line length
Also remove an extra star in comment.
Change-Id: I2ef938573e75022dcb31c935dde7d3055e7a53f0 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/northbridge/intel/i945/memmap.c 1 file changed, 3 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/02/40802/2
HAOUAS Elyes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40802 )
Change subject: nb/intel/i945/memmap: Convert to 96 characters line length ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/40802/1/src/northbridge/intel/i945/... File src/northbridge/intel/i945/memmap.c:
https://review.coreboot.org/c/coreboot/+/40802/1/src/northbridge/intel/i945/... PS1, Line 68: /**
Oops :) […]
done?
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40802 )
Change subject: nb/intel/i945/memmap: Convert to 96 characters line length ......................................................................
Patch Set 2: Code-Review+1
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40802 )
Change subject: nb/intel/i945/memmap: Convert to 96 characters line length ......................................................................
Patch Set 2: Code-Review+2
(1 comment)
https://review.coreboot.org/c/coreboot/+/40802/1/src/northbridge/intel/i945/... File src/northbridge/intel/i945/memmap.c:
https://review.coreboot.org/c/coreboot/+/40802/1/src/northbridge/intel/i945/... PS1, Line 68: /**
done?
Done
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/40802 )
Change subject: nb/intel/i945/memmap: Convert to 96 characters line length ......................................................................
nb/intel/i945/memmap: Convert to 96 characters line length
Also remove an extra star in comment.
Change-Id: I2ef938573e75022dcb31c935dde7d3055e7a53f0 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr Reviewed-on: https://review.coreboot.org/c/coreboot/+/40802 Reviewed-by: Paul Menzel paulepanter@users.sourceforge.net Reviewed-by: Angel Pons th3fanbus@gmail.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/northbridge/intel/i945/memmap.c 1 file changed, 3 insertions(+), 6 deletions(-)
Approvals: build bot (Jenkins): Verified Paul Menzel: Looks good to me, but someone else must approve Angel Pons: Looks good to me, approved
diff --git a/src/northbridge/intel/i945/memmap.c b/src/northbridge/intel/i945/memmap.c index ee9f100..0183ea2 100644 --- a/src/northbridge/intel/i945/memmap.c +++ b/src/northbridge/intel/i945/memmap.c @@ -65,11 +65,10 @@ return (void *) top_of_ram; }
-/** Decodes used Graphics Mode Select (GMS) to kilobytes. */ +/* Decodes used Graphics Mode Select (GMS) to kilobytes. */ u32 decode_igd_memory_size(const u32 gms) { - static const u16 ggc2uma[] = { 0, 1, 4, 8, 16, 32, - 48, 64 }; + static const u16 ggc2uma[] = { 0, 1, 4, 8, 16, 32, 48, 64 };
if (gms >= ARRAY_SIZE(ggc2uma)) die("Bad Graphics Mode Select (GMS) setting.\n"); @@ -91,9 +90,7 @@ * RAM to cover both cbmem as the TSEG region. */ top_of_ram = (uintptr_t)cbmem_top(); - postcar_frame_add_mtrr(pcf, top_of_ram - 8*MiB, 8*MiB, - MTRR_TYPE_WRBACK); + postcar_frame_add_mtrr(pcf, top_of_ram - 8*MiB, 8*MiB, MTRR_TYPE_WRBACK); postcar_frame_add_mtrr(pcf, northbridge_get_tseg_base(), northbridge_get_tseg_size(), MTRR_TYPE_WRBACK); - }
9elements QA has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40802 )
Change subject: nb/intel/i945/memmap: Convert to 96 characters line length ......................................................................
Patch Set 3:
Automatic boot test returned (PASS/FAIL/TOTAL): 4/0/4 Emulation targets: "QEMU x86 q35/ich9" using payload TianoCore : SUCCESS : https://lava.9esec.io/r/3175 "QEMU x86 q35/ich9" using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/3174 "QEMU x86 i440fx/piix4" using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/3173 "QEMU AArch64" using payload LinuxBoot_u-root_kexec : SUCCESS : https://lava.9esec.io/r/3172
Please note: This test is under development and might not be accurate at all!