Attention is currently required from: Felix Singer, Nico Huber, Michał Żygowski, Michał Kopeć, Paul Menzel, Tim Wawrzynczak, Angel Pons. Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59548 )
Change subject: mb/clevo/tgl-u: add new board L14xMU ......................................................................
Patch Set 14:
(4 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/59548/comment/12e7b89c_a752dae7 PS14, Line 56: - WLAN/BT (PCIe) - gets detected but can't be enabled
Could it be related to rfkill stuff?
yes, bc of the missing EC driver
File src/mainboard/clevo/tgl-u/Kconfig:
https://review.coreboot.org/c/coreboot/+/59548/comment/7c04602c_845eb4a7 PS13, Line 12: select MAINBOARD_HAS_LPC_TPM
What if someone wants to use fTPM?
well, we have no means making that selectable for the user atm. We'll need to resolve that issue with fTPM when using recent vendor csme-regions, where we can add some Kconfig/cmos option for making it choosable for the user.
File src/mainboard/clevo/tgl-u/variants/l140mu/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/59548/comment/514e0b3d_febe1a3b PS13, Line 147: device ref i2c1 on
What is this used for?
TBT ROM, I'll add a comment
File src/mainboard/clevo/tgl-u/variants/l140mu/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/59548/comment/8d012fff_1c9fd8f3 PS14, Line 191: device ref peg on
nit: I'd move this before `tbt_pcie_rp0`
why? it's a SSD slot like pcie_rp9, so grouping them makes more sense to me
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Michael Niewöhner (Code Review)