[L] Change in coreboot[main]: soc/intel/xeon_sp: Share DDR codes across Xeon-SP platforms

[Nico Huber (Code Review)]

Attention is currently required from: Arthur Heymans, Christian Walter, Jincheng Li, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Patrick Rudolph, Shuo Liu, Tim Chu.

Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81219?usp=email )

Change subject: soc/intel/xeon_sp: Share DDR codes across Xeon-SP platforms
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Patch Set 13: Code-Review+1