[XS] Change in coreboot[main]: soc/amd/cezanne: Add AMD Renoir SOC support

[Anand Vaikar (Code Review)]

Anand Vaikar has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/83099?usp=email )

Change subject: soc/amd/cezanne: Add AMD Renoir SOC support
......................................................................

soc/amd/cezanne: Add AMD Renoir SOC support

Add AMD SOC Family 17h Renoir CPUIDs per PPR doc #55922

Change-Id: I6b43eb782527351c79b835d094a5b61103cd6642
Signed-off-by: Anand Vaikar 
---
M src/soc/amd/cezanne/cpu.c
M src/soc/amd/cezanne/include/soc/cpu.h
2 files changed, 2 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/83099/1

diff --git a/src/soc/amd/cezanne/cpu.c b/src/soc/amd/cezanne/cpu.c
index 2c3100f..4f39aef 100644
--- a/src/soc/amd/cezanne/cpu.c
+++ b/src/soc/amd/cezanne/cpu.c
@@ -24,6 +24,7 @@

static struct cpu_device_id cpu_table[] = {
    { X86_VENDOR_AMD, CEZANNE_A0_CPUID, CPUID_ALL_STEPPINGS_MASK },
+	{ X86_VENDOR_AMD, RENOIR_A1_CPUID,  CPUID_ALL_STEPPINGS_MASK},
    CPU_TABLE_END
 };

diff --git a/src/soc/amd/cezanne/include/soc/cpu.h b/src/soc/amd/cezanne/include/soc/cpu.h
index 0239e19..1506420 100644
--- a/src/soc/amd/cezanne/include/soc/cpu.h
+++ b/src/soc/amd/cezanne/include/soc/cpu.h
@@ -4,6 +4,7 @@
 #define AMD_CEZANNE_CPU_H

#define CEZANNE_A0_CPUID	CPUID_FROM_FMS(0x19, 0x50, 0)
+#define RENOIR_A1_CPUID		CPUID_FROM_FMS(0X17, 0X60, 1)

#define CEZANNE_VBIOS_VID_DID	0x10021638
 #define BARCELO_VBIOS_VID_DID	0x100215e7