[S] Change in coreboot[main]: soc/amd/cezanne: add option to disable I2S master clock output of FCH - coreboot-gerrit

9 Jan 2025


      Attention is currently required from: Ana Carolina Cabral, Anand Vaikar, Fred Reitberger, Jason Glenesk, Matt DeVillier, Nick Kochlowski.
Felix Held has posted comments on this change by Anand Vaikar. ( https://review.coreboot.org/c/coreboot/+/85865?usp=email )
Change subject: soc/amd/cezanne: add option to disable I2S master clock output of FCH
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Patch Set 4: Code-Review+2
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Gerrit-MessageType: comment
Gerrit-Project: coreboot
Gerrit-Branch: main
Gerrit-Change-Id: I0c1bee121f528d28d591dace260507b345dfec26
Gerrit-Change-Number: 85865
Gerrit-PatchSet: 4
Gerrit-Owner: Anand Vaikar a.vaikar2021@gmail.com
Gerrit-Reviewer: Ana Carolina Cabral
Gerrit-Reviewer: Felix Held felix-coreboot@felixheld.de
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Gerrit-Comment-Date: Thu, 09 Jan 2025 10:13:52 +0000
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